Preface |
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xvi | |
Acknowledgments |
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xx | |
Editors' biographies |
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xxi | |
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xxiv | |
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1 An FPGA implementation of the RSA algorithm using VHDL and a Xilinx system generator for image applications |
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1 | (1) |
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2 | (1) |
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3 | (4) |
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1.2.1 Introduction to cryptographic algorithms |
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3 | (1) |
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1.2.2 Types of cryptographic algorithm |
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3 | (1) |
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1.2.3 Important terminology |
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4 | (3) |
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1.2.4 Comparison of different cryptographic algorithms |
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7 | (1) |
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1.2.5 Comparison of the implementations of different cryptographic algorithms |
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7 | (1) |
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1.3 Mathematical formulation |
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7 | (5) |
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8 | (1) |
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1.3.2 The Euclidean algorithm |
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8 | (1) |
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1.3.3 The extended Euclidean algorithm |
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8 | (1) |
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1.3.4 Euler's totient function and Euler's theorem |
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9 | (1) |
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1.3.5 Modular exponentiation techniques |
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10 | (1) |
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1.3.6 Chinese remainder theorem |
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11 | (1) |
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12 | (1) |
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12 | (1) |
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12 | (1) |
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12 | (1) |
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1.5 System implementation |
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13 | (10) |
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13 | (1) |
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14 | (5) |
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19 | (2) |
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1.5.4 Area and throughput comparison with existing implementations |
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21 | (2) |
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1.6 Implementation results for the SPARTAN-6 (XC6SLX45-CSG324) FPGA board |
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23 | (4) |
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1.6.1 Design of the SPARTAN-6 (XC6SLX45-CSG324) FPGA board |
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23 | (2) |
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1.6.2 Implementation of key security for the AES algorithm using RSA (hybrid cryptosystem) |
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25 | (2) |
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27 | |
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27 | (1) |
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27 | |
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2 Modern ML methods for object detection |
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1 | (1) |
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1 | (1) |
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2.2 Machine-learning overview |
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2 | (1) |
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2.3 Computer vision algorithms |
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3 | (8) |
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2.3.1 Image classification |
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3 | (1) |
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4 | (1) |
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2.3.3 Segmentation of images |
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5 | (1) |
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2.3.4 You Only Look Once (YOLO) |
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5 | (3) |
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2.3.5 Faster region-based convolutional neural networks |
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8 | (1) |
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2.3.6 Support vector machine (SVM) |
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8 | (1) |
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2.3.7 Systolic array architectures |
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9 | (1) |
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10 | (1) |
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2.4 Hardware implementation |
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11 | (3) |
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14 | |
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Bibliography and further reading |
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14 | |
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3 Embedded intelligence for tracking facial expressions |
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1 | (1) |
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1 | (2) |
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3.2 Description of algorithm |
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3 | (2) |
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5 | (6) |
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3.3.1 OpenCV with three simple Haar Cascades |
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5 | (1) |
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6 | (1) |
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7 | (1) |
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3.3.4 Mitigating loss of track |
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8 | (3) |
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3.4 Results and evaluation |
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11 | (4) |
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15 | |
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4 The roles of delay and power optimization techniques in VLSI design |
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1 | (1) |
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1 | (1) |
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2 | (1) |
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2 | (1) |
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4.3.1 The concept of the variable input delay technique |
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2 | (1) |
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4.4 System implementation |
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3 | (3) |
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3 | (2) |
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5 | (1) |
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4.5 Digital Logic Design and Implementation |
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6 | (5) |
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4.5.1 Architectural design of the work |
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6 | (5) |
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4.6 Hardware/software used for experiments |
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11 | (1) |
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4.6.1 Introduction to the ISE design suite |
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11 | (1) |
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4.6.2 Features of the Spartan 3E |
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12 | (1) |
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4.7 Experimental results and analysis |
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12 | (3) |
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4.7.1 Experimental variations |
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12 | (1) |
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4.7.2 Experimental details |
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13 | (2) |
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15 | (1) |
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4.8.1 Simulation results for the full adder |
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15 | (1) |
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4.9 Comparative analysis of results |
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16 | (1) |
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4.10 Comparison of results |
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17 | (2) |
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19 | |
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Bibliography and further reading |
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20 | |
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5 SIVAS: smart interactive virtual assistance system--a voice user interface |
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1 | (1) |
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1 | (3) |
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2 | (1) |
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2 | (1) |
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2 | (1) |
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3 | (1) |
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4 | (1) |
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5 | (4) |
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5 | (1) |
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6 | (1) |
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7 | (2) |
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9 | (1) |
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9 | (1) |
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9 | (1) |
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9 | (1) |
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10 | (1) |
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5.5 Hardware implementation |
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10 | (1) |
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10 | (1) |
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10 | (1) |
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11 | (1) |
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5.7 Limitations and future work |
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12 | (1) |
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5.8 Result and conclusions |
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12 | |
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12 | (1) |
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13 | |
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6 A topical survey of computing solutions for plant disease classification using deep learning techniques |
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1 | (1) |
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1 | (1) |
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2 | (4) |
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6 | (9) |
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10 | (1) |
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6.3.2 Convolutional neural network-long short-term network (CNN-LSTM) [ 19] |
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11 | (1) |
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12 | (2) |
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14 | (1) |
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6.4 Comparative study for performance analysis |
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15 | (1) |
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6.5 Common findings and challenges |
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16 | (1) |
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16 | (1) |
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16 | (1) |
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6.6 Hardware implementations |
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16 | (1) |
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7 Hardware IP cores for image processing functions Anirban Sengupta and Rahul Chaurasia |
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1 | (1) |
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1 | (2) |
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7.2 HLS methodology used to design IP cores for image processing functions |
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3 | (8) |
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7.2.1 Generalization of convolution for image processing functions |
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3 | (3) |
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7.2.2 Application-specific reusable IP cores for image processing functions |
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6 | (5) |
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7.3 Case studies and analysis |
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11 | (2) |
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7.3.1 Gate-count analysis |
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12 | (1) |
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12 | (1) |
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14 | (1) |
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14 | |
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8 An efficient underwater image cryptosystem that uses a novel hybrid algorithm |
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1 | (1) |
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1 | (2) |
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8.2 Dynamic histogram enhancement technique |
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3 | (3) |
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8.3 Improved secure force algorithm for underwater image transmission |
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6 | (2) |
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8.3.1 Key-generation block |
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6 | (1) |
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8.3.2 Key management block |
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7 | (1) |
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7 | (1) |
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8.4 Evaluation parameters used for the hybrid underwater image cryptosystem |
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8 | (3) |
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8.4.1 Peak signal-to-noise ratio and mean squared error |
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8 | (1) |
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8.4.2 Mean absolute error |
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8 | (1) |
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8.4.3 Horizontal and vertical correlations |
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9 | (1) |
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8.4.4 Number of pixels change rate (NPCR) and unified average change intensity (UACI) |
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9 | (1) |
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8.4.5 Encryption and decryption times |
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10 | (1) |
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8.5 Results and discussion |
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11 | (2) |
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9 A survey of thresholding in image processing |
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1 | (1) |
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1 | (1) |
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9.2 Histogram-based methods |
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2 | (1) |
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9.2.1 Balanced-histogram-based thresholding |
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3 | (1) |
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9.3 Clustering-based methods |
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3 | (2) |
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9.3.1 Iterative clustering |
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3 | (1) |
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9.3.2 Clustering thresholding |
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4 | (1) |
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9.3.3 Minimum-error thresholding |
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4 | (1) |
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9.3.4 Fuzzy clustering thresholding |
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5 | (1) |
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9.3.5 E-means clustering thresholding |
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5 | (1) |
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9.4 Entropy-based thresholding |
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5 | (1) |
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9.4.1 Cross-entropy thresholding |
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6 | (1) |
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9.4.2 Fuzzy entropy thresholding |
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6 | (1) |
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9.5 Attribute similarity methods |
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6 | (1) |
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7 | (1) |
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10 Review of quality assessment of fruit and vegetables using NIR spectroscopy |
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1 | (1) |
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1 | (1) |
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2 | (3) |
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3 | (1) |
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10.2.2 Modes of data acquisition in NIR spectroscopy systems |
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3 | (2) |
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5 | (1) |
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10.3.1 Preprocessing methods |
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5 | (1) |
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6 | (1) |
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10.4.1 Multiple linear regression (MLR) |
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6 | (1) |
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10.4.2 Principal component regression (PCR) |
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6 | (1) |
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10.4.3 Partial least-squares regression (PLS) |
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7 | (1) |
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10.4.4 Least-squares support vector machine (LS-SVM) |
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7 | (1) |
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10.4.5 Artificial neural network (ANN) |
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7 | (1) |
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10.5 DLP technology in near-infrared (NIR) spectroscopy |
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7 | (6) |
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10.5.1 Proposed fruit and vegetable quality detection system |
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11 | (2) |
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10.6 Fruit and vegetable quality parameters |
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13 | (1) |
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10.6.1 Soluble solid content (SSC) |
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13 | (1) |
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13 | (1) |
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14 | (1) |
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14 | (1) |
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10.6.5 Titratable acidity |
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14 | (1) |
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10.6.6 Carotenoid content |
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14 | (1) |
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14 | (1) |
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15 | |
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Bibliography and further reading |
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15 | |
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11 Design and implementation of processors for secure image processing applications |
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1 | (1) |
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1 | (1) |
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2 | (1) |
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3 | (2) |
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4 | (1) |
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11.3.2 Urdhva tiryagbhyam |
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4 | (1) |
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4 | (1) |
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11.4 Proposed system design and architecture |
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5 | (4) |
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6 | (1) |
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11.4.2 Fundamental building blocks |
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6 | (2) |
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11.4.3 Instruction set architecture |
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8 | (1) |
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11.4.4 Software specification and design flow |
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8 | (1) |
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9 | (2) |
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11.5.1 Integrated circuit design |
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9 | (1) |
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9 | (2) |
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11.5.3 Performance analysis |
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11 | (1) |
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11 | (5) |
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11.7 Results and conclusions |
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12 Low-power modified phase-locked loop using AVLS technique for biomedical applications |
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1 | (1) |
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1 | (2) |
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3 | (1) |
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12.3 Design and implementation of a modified PLL |
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4 | (5) |
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4 | (2) |
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12.3.2 Charge pump, loop filter, and current-starved VCO |
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6 | (1) |
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7 | (1) |
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12.3.4 Proposed modified PLL |
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8 | (1) |
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12.4 Results and discussion |
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9 | (3) |
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13 Image multiplication with a power-efficient approximate multiplier using a 4:2 compressor |
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1 | (1) |
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1 | (3) |
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13.2 Existing 4:2 compressor |
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4 | (2) |
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6 | (1) |
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13.4 Results and discussion |
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7 | (5) |
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13.4.1 Simulations of 4:2 compressors and multipliers |
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7 | (1) |
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13.4.3 Image multiplication |
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10 | (2) |
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12 | (1) |
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12 | (2) |
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14 A comparison of different procedures for hardware-based video shot boundary detection |
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1 | (1) |
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1 | (2) |
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3 | (4) |
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7 | (6) |
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14.3.1 Comparative discussion of results |
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8 | (1) |
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14.3.2 Hardware implementation |
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8 | (5) |
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13 | |
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14 | (1) |
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15 Hardware--software co-simulation of vehicle license plate detection on the ZedBoard SoC platform |
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1 | |
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1 | (4) |
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3 | (2) |
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15.1.2 Contributions and organization |
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5 | (1) |
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15.2 Descriptions of algorithms |
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5 | (5) |
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15.2.1 Edge-based extraction |
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5 | (1) |
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15.2.2 Connected-component-based extraction |
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6 | (2) |
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15.2.3 Histogram-based edge processing |
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8 | (2) |
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10 | (2) |
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15.4 Hardware-software co-simulation of automatic license plate detection on the ZedBoard SoC platform |
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12 | (4) |
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12 | (1) |
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15.4.2 System generator model |
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13 | (3) |
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15.5 Results and utilization summary |
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16 | (2) |
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15.5.1 Resource utilization summary |
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16 | (2) |
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15.6 Conclusions and future work |
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18 | |
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18 | |