These proceedings of the October 2008 symposium include materials presented at all regular sessions, poster sessions, invited talks, and panels. Topics include defect and fault tolerance (including papers on using architectures for yield improvement and coping with obsolescence), dependability analysis and evaluation (including a network fault model, obtaining microprocessor vulnerability data), hot topics (Trojan horse detection, soft error susceptibility in nanoscale CMOS), design for testability (optimizing full coverage and the impact of default tolerant BIST), reliability and fault tolerance (material fatigue, design-space exploration), error detection and correction (adaptive error control, error detection logic), testing techniques (core chest wrapper design, heuristics-dependent observation), and testing for timing and parametric failures. Particularly interesting are papers on emerging technologies, which include a statistical model for assessing the fault tolerance of variable switching currents and a tile-based error model for forward growth of DNA self-assembly. Annotation ©2008 Book News, Inc., Portland, OR (booknews.com)