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1 Fundamentals of Passive Circuit Analysis |
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1 | (32) |
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1 | (1) |
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1.2 Definitions of Passive Elements |
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1 | (2) |
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1.3 Time-Domain Analysis of First Order Passive Circuits |
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3 | (9) |
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3 | (3) |
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6 | (6) |
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1.4 First Order Passive Circuit Analysis Using Natural Frequencies |
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12 | (2) |
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1.5 Time-Domain Analysis of Second Order Passive Circuits |
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14 | (5) |
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1.6 Transfer Function and Circuit Stability |
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19 | (14) |
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2 Diode and Bipolar Transistor Circuits |
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33 | (24) |
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2.1 A Brief Review of Semiconductors |
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33 | (3) |
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36 | (2) |
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2.3 Rectifying Diode Circuits |
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38 | (4) |
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42 | (1) |
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2.5 Light Emitting Diode (LED) |
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42 | (1) |
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43 | (2) |
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2.7 Bipolar Transistor Circuits |
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45 | (12) |
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3 MOS Transistors and CMOS Circuits |
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57 | (32) |
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3.1 N-Channel MOSFET (NMOSFET) |
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57 | (2) |
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3.2 P-Channel MOSFET (PMOSFET) |
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59 | (3) |
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3.3 Complementary MOS (CMOS) Inverter |
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62 | (1) |
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3.4 Two-Input CMOS NAND Logic Gate |
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63 | (2) |
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3.5 Two-Input CMOS NOR Logic Gate |
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65 | (1) |
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3.6 Complex CMOS Logic Gate Implementation |
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66 | (6) |
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72 | (1) |
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73 | (16) |
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4 TTL Logic and CMOS-TTL Interface |
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89 | (34) |
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89 | (4) |
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4.2 TTL Inverter with Open Collector |
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93 | (4) |
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4.3 Two-Input TTL Nand Logic Gate |
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97 | (2) |
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4.4 Two-Input TTL NOR Logic Gate |
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99 | (3) |
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4.5 Input Current and Voltage Measurements of a Logic Gate |
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102 | (1) |
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4.6 Output Current and Voltage Measurements of a Logic Gate |
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103 | (1) |
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4.7 TTL-CMOS Interface with a Pull-up Resistor |
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104 | (4) |
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4.8 TTL-CMOS Interface with a Bipolar Transistor |
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108 | (7) |
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4.9 CMOS-TTL Interface with a Pull-Down Resistor |
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115 | (3) |
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4.10 CMOS-TTL Interface with a Bipolar Transistor |
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118 | (5) |
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123 | (12) |
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123 | (2) |
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125 | (2) |
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127 | (2) |
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129 | (1) |
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5.5 Piezoelectric Materials and Accelerometers |
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129 | (3) |
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132 | (3) |
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6 Operational Amplifiers and Circuits |
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135 | (22) |
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6.1 Operational Amplifier Properties |
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135 | (1) |
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6.2 Voltage Amplifier Circuits for Sensors |
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135 | (9) |
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6.3 Trans-resistance Amplifier Circuits for Sensors |
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144 | (2) |
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6.4 Analog Voltage Comparator |
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146 | (1) |
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147 | (3) |
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6.6 Square Waveform Generator |
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150 | (7) |
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157 | (18) |
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7.1 Analog-to-Digital Converter Principles |
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157 | (3) |
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7.2 Sample and Hold Principle |
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160 | (1) |
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7.3 Flash Type Analog-to-Digital Converter |
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160 | (2) |
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7.4 Ramp Type Analog-to-Digital Converter |
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162 | (3) |
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7.5 Successive Approximation Type Analog-to-Digital Converter |
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165 | (4) |
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7.6 Weighted Sum Type Digital-to-Analog Converter |
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169 | (1) |
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7.7 Ladder Type Digital-to-Analog Converter |
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170 | (5) |
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8 Front-End Electronics for Embedded Systems |
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175 | (26) |
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8.1 Electromechanical, Device Control |
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175 | (3) |
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8.2 Pulse Width Modulation Circuits |
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178 | (3) |
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181 | (1) |
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181 | (1) |
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8.5 Hall-Effect Sensor Control |
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182 | (1) |
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8.6 Design Project 1: Designing Front-End Electronics for an Analog Microphone |
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183 | (2) |
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8.7 Design Project 2: Designing Front-End Electronics for a Temperature Measurement System |
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185 | (4) |
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8.8 Project 3: Designing Front-End Electronics for a Light Level Measurement System |
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189 | (2) |
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8.9 Project 4: Designing Photo Detector Circuits |
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191 | (3) |
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8.10 Project 5: Designing Front-End Electronics for an Optoelectronic Tachometer |
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194 | (2) |
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8.11 Project 6: Designing Front-End Electronics for a Hall-Effect-Based Tachometer |
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196 | (5) |
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9 Review of Combinational and Sequential Logic Circuits and Design |
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201 | (94) |
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202 | (6) |
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208 | (3) |
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9.3 Designing Combinational Circuits Using Truth Tables |
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211 | (3) |
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9.4 Combinational Logic Minimization-Karnaugh Maps |
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214 | (6) |
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220 | (9) |
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229 | (11) |
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240 | (1) |
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241 | (3) |
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244 | (3) |
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247 | (2) |
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9.11 Timing Methodology Using D Latches |
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249 | (1) |
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250 | (2) |
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9.13 Timing Methodology Using D Flip-Flops |
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252 | (2) |
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254 | (5) |
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259 | (2) |
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261 | (1) |
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262 | (1) |
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9.18 Moore-Type State Machine |
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263 | (5) |
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9.19 Mealy-Type State Machine |
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268 | (4) |
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9.20 Controller Design: Moore-Type State Machine Versus Counter-Decoder Scheme |
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272 | (4) |
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9.21 A Simple Memory Block |
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276 | (3) |
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279 | (16) |
Index |
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295 | |