This book constitutes the proceedings of the 21
st International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021, which took place in July 2021. Due to COVID-19 pandemic the conference was held virtually.
The 17 full papers presented in this volume were carefully reviewed and selected from 45 submissions. The papers are organized in topics as follows: simulation and design space exploration; the 3Cs - Cache, Cluster and Cloud; heterogeneous SoC; novel CPU architectures and applications; dataflow; innovative architectures and tools for security; next generation computing; insights from negative results.
Simulation and Design Space Exploration.- Accurate LLVM IR to Binary
CFGs Mapping for Simulation of Optimized Embedded Software.- RVfplib: A Fast
and Compact Open-Source Floating-Point Emulation Libbrary for Tiny RISC-V
Processors.-Exploiting Similarity in Evolutionary Product Design for Improved
Design Space Exploration.- Automatic Search-Space Compression in System-Level
Design Space Exploration using Deep Generative Models.- The 3Cs - Cache,
Cluster and Cloud.-A Case for Partial Co-Allocation Constraints in Compressed
Caches.- PoCL-R: A Scalable Low Latency Distributed OpenCL Runtime.- An
analytical model for loop tiling transformation.-Interference-aware workload
placement for improving latency distribution of converged HPC/Big Data cloud
infrastructures.- Energy-efficient and High-throughput CNN Inference on
Embedded CPUsGPUs MPSoCs.- Evaluating System Identification Methods for
Predicting Thermal Dissipation of Heterogeneous SoCs.- Embeddings of Task
Mappings to Multicore Systems.- Novel CPU Architectures and Applications.-
RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security
Enforcement.- Phase-Aware CPU Workload Forecasting.- WhiskEras 2.0: Fast and
Accurate Whisker Tracking In Rodents.- Periodic Scheduling of Cyclo-Static
Dataflow Models.- Efficient Operator Sharing Modulo Scheduling for
Sum-Product Network Inference on FPGAs.- A Framework for Fixed Priority
Periodic Scheduling Synthesis from Synchronous Data-flow Graphs.- Special
Session on Innovative Architectures and tools for Security.- Hard edges:
Hardware-based Control-Flow Integrity for Embedded Devices.- Deep Learning
Techniques for Side-Channel Analysis on AES Datasets Collected from Hardware
and Software Platforms.- Special Session on Reports from research projects
Digital services and platforms: Application areas automotive industry,
energy, agriculture, healthcare and industry 4.0 workshop.- EDRA: A
Hardware-assisted Decoupled Access/Execute Framework on the Digital Market.-
Modeling the Scalability of the EuroExa Reconfigurable Accelerators -
Preliminary Results? .-The Known Unknowns: Discovering Trade-offs Between
Heterogeneous Code Changes.- Towards efficient HW acceleration in edge-cloud
infrastructures: The SERRANO approach.- Cross-domain Modelling of
Verification and Validation Workflows in the Large Scale European Research
Project VALU3S.- Special Session on Next Generation Computing
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