Atjaunināt sīkdatņu piekrišanu

Embedded Memory Design for Multi-Core and Systems on Chip 2014 ed. [Hardback]

  • Formāts: Hardback, 95 pages, height x width: 235x155 mm, weight: 342 g, 37 Illustrations, color; 26 Illustrations, black and white; XIII, 95 p. 63 illus., 37 illus. in color., 1 Hardback
  • Sērija : Analog Circuits and Signal Processing 116
  • Izdošanas datums: 23-Oct-2013
  • Izdevniecība: Springer-Verlag New York Inc.
  • ISBN-10: 146148880X
  • ISBN-13: 9781461488804
Citas grāmatas par šo tēmu:
  • Hardback
  • Cena: 91,53 €*
  • * ši ir gala cena, t.i., netiek piemērotas nekādas papildus atlaides
  • Standarta cena: 107,69 €
  • Ietaupiet 15%
  • Grāmatu piegādes laiks ir 3-4 nedēļas, ja grāmata ir uz vietas izdevniecības noliktavā. Ja izdevējam nepieciešams publicēt jaunu tirāžu, grāmatas piegāde var aizkavēties.
  • Daudzums:
  • Ielikt grozā
  • Piegādes laiks - 4-6 nedēļas
  • Pievienot vēlmju sarakstam
  • Formāts: Hardback, 95 pages, height x width: 235x155 mm, weight: 342 g, 37 Illustrations, color; 26 Illustrations, black and white; XIII, 95 p. 63 illus., 37 illus. in color., 1 Hardback
  • Sērija : Analog Circuits and Signal Processing 116
  • Izdošanas datums: 23-Oct-2013
  • Izdevniecība: Springer-Verlag New York Inc.
  • ISBN-10: 146148880X
  • ISBN-13: 9781461488804
Citas grāmatas par šo tēmu:
This book describes the various tradeoffs systems designers face when designing embedded memory. It uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.

This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.