Engineering December 2001 Vol 7/4 []

CONTENTS & ABSTRACTS

In English. Summaries in Estonian

Proceedings of theEstonian Academy of Sciences.

Engineering



Volume 7 No. 4December 2001



Guesteditorial; 251–252

(full article in PDF format)

Mart MIN

Modulelevel defect simulation in digital circuits; 253–268

(full article in PDF format)

Wieslaw KUZMICZ, Witold PLESKACZ, Jaan RAIK,and Raimund UBAR

Abstract. A new method forparametric defect modelling is developed for calculating the conditions foractivating physical defects in the modules (for example, in library components)of digital circuits. The method affords for the first time the possibility tohandle the defects which increase the number of states in the circuit. By usingthe concept of functional faults, the new method of defect modelling by logicconditions is generalized for hierarchical fault simulation. A method isproposed to find the types of faults that may occur in a real circuit, todetermine their probabilities, and to find the input test patterns that detectthese faults. A new hierarchical defect-oriented fault simulation method is presented.At the higher (module) level simulation we use the functional fault model, atthe lower level the defect/fault relationships in the form of defect coveragetable and conditional defect probabilities. Experimental data of thehierarchical defect-oriented simulation for ISCAS’85 benchmarks are presented,which show that classical stuck-at fault based simulation and the test coveragecalculation, based on counting defects without considering defectprobabilities, may lead to considerable overestimation of results.

Key words: digital circuits,component libraries, physical defects, faults, stuck-at fault model, functionalfaults, defect/fault relationships, probabilistic defect analysis,defect-oriented fault simulation.

Applicationof structurally synthesized binary decision diagrams for timing simulation ofdigital circuits; 269–288

(full article in PDF format)

Artur JUTMAN and Raimund UBAR

Abstract. Meeting the timing requirements is an important constraint imposedon highly integrated circuits, and the verification of timing of a circuitbefore manufacturing is one of the critical tasks to be solved by CAD tools. Inthis paper, we present a novel technique to speed up gate-level timingsimulation that is based on Structurally Synthesized Binary Decision Diagrams(SSBDD), which have already found application as an efficient mathematicalmodel to represent digital circuits. The new approach uses path delays insteadof gate delays for tree-like subcircuits (macros). Therefore timing waveformsare calculated not for all internal nodes of the gate-level circuit, but onlyfor outputs of macros. The macros are represented by SSBDDs, which enable afast computation of delays for macros. We show that the speed-up of timingsimulation is directly proportional to the average size of macros in thecircuit. The new approach to speed up the timing simulation is supported byencouraging experimental results.

Key words: timing simulation, binary decision diagrams, delay modelling.

Modellingnon-linear systems by extended Fourier series; 289–308

(full article in PDF format)

Vello KUKK

Abstract. The paper deals withmodelling of non-linear systems consisting of highly oscillating subsystems.Signals are represented as Fourier series extended by half-frequency componentsthat make it possible to model the transients. Macromodels for non-lineartransformations are based on harmonic linearization, implemented by theChebyshev expansion. This enables independent description of the non-lineartransformation and calculation of the Chebyshev transformation of waveformsthat appear during the solution. Integration method based on this approach hasexcellent stability properties and its accuracy can be checked by usingdifferent number of harmonics.

Key words: modelling,non-linear systems, oscillators, Fourier series, Chebyshev transformation.

Onfrequency adaptation in an extended block-adaptive Fourier analyser;309–330

(full article in PDF format)

Ants RONK

Abstract. The aim of this work isto form a basis for developing an efficient adaptive multi-frequency adaptationalgorithm for an extended block-adaptive Fourier analyser (EBAFA), whichperforms simultaneously separation and analysis of its input signal’s periodiccomponents of different frequencies and waveforms. A brief description of EBAFAis given and several possibilities to improve estimation of differences betweenfundamental frequencies of signal’s periodic components and correspondingresonator groups of EBAFA are considered.

Key words: adaptive filters,observers, resonators, spectral analysis, waveform analysis, frequencyestimation.

Linearityrestrictions for a class of phase frequency detectors;331–346

(full article in PDF format)

Vello MÄNNAMA and Toivo PAAVLE

Abstract. In this paper, thetransfer characteristic of a class of phase frequency detectors is analysed andmodelled for simulations. It is demonstrated that the reasons of non-linearityof the transfer characteristic may originate both from the charge pump and thelogic control unit of the phase frequency detector. Restricted slew rate isfound to be one of the main reasons of non-linearity of the charge pump,determining the minimum duration of control signals. For a generalizedstructure of the control unit, an optimum distribution of gate delays isproposed. Also, some critical aspects of selecting the delays are consideredwhich may cause significant non-linearity with a dead zone and even oscillationof the phase frequency detector. The results of the analysis are verified bytransistor level SPICE simulation.

Key words: phase frequencydetector, charge pump, gate delay, transfer characteristic, dead zone.

Comparativecharacteristics of 6H– and 4H–SiC surfaces in diffusion welding;347–353

(full article in PDF format)

Oleg KOROLKOV and Toomas RANG

Abstract. The results ofexperimental investigations of diffusion welded (bonded) large area Al/SiCcontacts are presented. The surface flatness of 4H–SiC structures with anepitaxial layer is investigated. New data on crystal surface quality ofdifferent producers are presented. The U–I characteristic of a large areaAl–4H–SiC Schottky structure based on Sterling SiC is briefly discussed.

Key words: SiC, diffusionwelding technology, SiC wafer surface quality, Al–4H–SiC Schottky structure.



CHRONICLE



Leo Mõtus 60; 354–355

Raimund Ubar 60; 356–357

Contents of volume 7; 358–359