Design State-of-the-Art GPS/Galileo Dual RF Receivers
This authoritative guide walks you through the process of designing, fabricating, and testing a highly integrated, low-noise, low-power, and low-cost RF front-end for GPS and Galileo, the leading satellite-based global navigation systems. Everything from standards analysis to characterization of the design is covered in the book.
GPS Andamp; Galileo focuses on developing seamlessly interoperable receivers that can access the wide variety of new services offered by these systems, such as increased service availability, centimeter-sensitive accuracy, emergency management, and data confidentiality. By the end of the book, you will have a prototype that achieves peak performance in terms of gain, NF, and current consumption, making it suitable for any high-accuracy, portable application.
Discover how to:
Determine the specifications of an interoperable dual GPS/Galileo RF front-end
Design all RFIC blocks, including the receiver chain, PLL, control logic, and PADs
Select the required external components
Implement optimal floor planning
- Perform validation testing of the integrated RF front-end
- Understand real-world fields of application
- Gauge the performance of the front-end within a receiver linked to a full-solution platform
| Acknowledgments |
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vii | |
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List of Abbreviations and Acronyms |
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viii | |
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1 | (26) |
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1 | (7) |
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Positioning through Satellites |
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8 | (11) |
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State-of-the-Art GNSS RF Front-End Receivers |
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19 | (5) |
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24 | (3) |
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27 | (34) |
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Global Navigation Satellite Systems |
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27 | (12) |
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39 | (20) |
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59 | (2) |
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61 | (62) |
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61 | (3) |
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64 | (7) |
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RF Pre-Amplifier and Mixer |
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71 | (13) |
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If Limiting Amplifiers and Filters |
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84 | (6) |
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Analogue-to-Digital Conversion (ADC) |
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90 | (2) |
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92 | (23) |
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115 | (7) |
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122 | (1) |
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123 | (32) |
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123 | (1) |
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Stages in the Validation of an Integrated Circuit Design |
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123 | (1) |
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Validation of Passive Element Models |
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124 | (2) |
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Individual Validation of Receiver Chain Blocks |
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126 | (24) |
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Characterisation of the Complete RF Front-End |
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150 | (3) |
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153 | (2) |
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155 | (18) |
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155 | (5) |
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Application Module for Cars |
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160 | (11) |
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171 | (2) |
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173 | (6) |
| Bibliography |
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179 | (4) |
| Index |
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183 | |
Dr. Jaizki Mendizabal received his MS and PhD degrees in Electrical Engineering from TECNUN Spain in 2000 and 2006 respectively. Since 2000, he has joined the RFIC research group at FhG-IISA, Germany, the RF design group at CEIT, Spain, and Mixed Signal research group at SANYO Electric Ltd, Japan as a RF-IC designer. He has been researching in the field of monolithic RF design for GNSS systems. He is also lecturer of RF Measurement Laboratory at TECNUN. Juan Melendez received his MS and PhD degrees in Industrial Engineering from TECNUN, Spain, in 1998 and 2002 respectively. He has worked at CEIT where he has been involved in the field of monolithic RF design for GNSS systems and at Hitachi Semiconductors Europe (London) involved in the design of 3rd generation mobile phone oscillators. Currently he is assistant professor of "Laboratory of Electronic Components" and "Electromagnetic Compatibility" in TECNUN. He is member of the IEEE EMC society and is author of several technical publications. He is author of the technical book "Design and Characterization of Integrated Varactors for RF Applications". Roc Berenguer received MSc. and Ph.D. degrees from TECNUN, Spain, in 1996 and 2000 respectively. In 1999 he joined CEIT as Associated Researcher. He has collaborated in the design of several front-ends for wireless standards like WLAN, DVB-H, GALILEO&GPS, ... He is currently interested in low power analog circuit design, particularly in low power RFIDs for wireless sensor networks and RF CMOS design in the 60GHz band. Currently he is also associate professor of Analog Integrated Circuits at TECNUN. He is the author of the technical book "Design and Test of Integrated Inductors for RF Applications" and of several technical publications.
