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E-grāmata: Operating System Design: The Xinu Approach, Second Edition

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  • Formāts: 701 pages
  • Izdošanas datums: 18-Feb-2015
  • Izdevniecība: Chapman & Hall/CRC
  • Valoda: eng
  • ISBN-13: 9781498712446
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Operating System Design: The Xinu Approach, Second EditionPalielināt
  • Formāts: 701 pages
  • Izdošanas datums: 18-Feb-2015
  • Izdevniecība: Chapman & Hall/CRC
  • Valoda: eng
  • ISBN-13: 9781498712446
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An Update of the Most Practical A-to-Z Operating System Book

Widely lauded for avoiding the typical black box approach found in other operating system textbooks, the first edition of this bestselling book taught readers how an operating system works and explained how to build it from the ground up.

Continuing to follow a logical pattern for system design, Operating System Design: The Xinu Approach, Second Edition removes the mystery from operating system design and consolidates the body of material into a systematic discipline. It presents a hierarchical design paradigm that organizes major operating system components in an orderly, understandable manner.

The book guides readers through the construction of a conventional process-based operating system using practical, straightforward primitives. It gives the implementation details of one set of primitives, usually the most popular set. Once readers understand how primitives can be implemented on conventional hardware, they can then easily implement alternative versions.

The text begins with a bare machine and proceeds step-by-step through the design and implementation of Xinu, which is a small, elegant operating system that supports dynamic process creation, dynamic memory allocation, network communication, local and remote file systems, a shell, and device-independent I/O functions. The Xinu code runs on many hardware platforms. This second edition has been completely rewritten to contrast operating systems for RISC and CISC processors. Encouraging hands-on experimentation, the book provides updated code throughout and examples for two low-cost experimenter boards: BeagleBone Black from ARM and Galileo from Intel.

Recenzijas

"What sets this book aside from the mass of books on operating systems is its focus on a single real-world operating systems, namely Xinu, which is a commercially used, yet lean, clearly designed, modular operating system for embedded, single-core systems. The book is surprisingly easy to read; essential data structures and algorithms are presented in source code and discussed adequately, allowing for a very good understanding of the entire operating system. an ideal book for anyone who aims to understand one operating system in detail, in particular for those working with embedded systems." Zentralblatt MATH 1314

Praise for the First Edition:"Operating System Design: The Xinu Approach is the best book for students and professionals to learn how a computer operating system works. The computer code, along with clear, concise explanations, is simply the best way to learn OS. Readers who study this book carefully will benefit greatly and find it time well spent." John C. Lin, Bell Labs

" [ the authors] focused, clear, and thorough writing have given systematic a new meaning (or perhaps restored its original one). non-OS specialists also stand to learn much of what they generally need to know from this excellent book. Furthermore, it is no faint praise for me to say that the books seamless integration of source code listings into the text is the best Ive encountered and works very well indeed. Superior and consistently followed C-language coding conventions give further evidence of the meticulousness with which this book was written. a most outstanding and practical A-to-Z OS book. It has my highest recommendation." George Hacken, Computing Reviews, April 2012

"This Xinu book is the best operating systems book on the market because it removes the black magic and explains how to build an OS from the ground up. Its not like other books I tried to read they gave me a headache. I have already started telling friends how great it is." David Bafumba-Lokilo, École Polytechnique de Montréal

"Understanding an operating system is a very difficult and time-consuming task because it is one of the most complex software systems ever built. Its architecture has multiple layers of software components to manage the underline hardware and provide the system call services to the applications at the top. Knowing the host processor hardware features, the machine languages, compilers, the tool chain, and the procedure calling standard are part of the prerequisites. As a consequence, operating system books can take a black box approach to cover the interface of the system call services and the operating system algorithms in a short time. However students wishing to program an embedded system must learn the details of the implementation. This Xinu book removes the black magic and explains how to build an OS from the ground up. It explains the underlying design policies behind each of the primary components of an operating system kernel and provides the concrete implementation of source code. The Xinu design principles can be found on other commercially available platforms. A device driver on Linux platform is one example. Students majoring in embedded systems are highly recommended to read this book." Donald D Kim, Information and Communication Engineering Department, Dongguk University, South Korea

Preface xix
About the Author xxiii
Chapter 1 Introduction And Overview 3(12)
1.1 Operating Systems
3(2)
1.2 Approach Used In The Text
5(1)
1.3 A Hierarchical Design
5(2)
1.4 The Xinu Operating System
7(1)
1.5 What An Operating System Is Not
8(1)
1.6 An Operating System Viewed From The Outside
9(1)
1.7 Remainder Of The Text
10(1)
1.8 Perspective
11(1)
1.9 Summary
11(4)
Chapter 2 Concurrent Execution And Operating System Services 15(22)
2.1 Introduction
15(1)
2.2 Programming Models For Multiple Activities
16(1)
2.3 Operating System Services
17(1)
2.4 Concurrent Processing Concepts And Terminology
17(2)
2.5 Distinction Between Sequential And Concurrent Programs
19(2)
2.6 Multiple Processes Sharing A Single Piece Of Code
21(2)
2.7 Process Exit And Process Termination
23(1)
2.8 Shared Memory, Race Conditions, And Synchronization
24(4)
2.9 Semaphores And Mutual Exclusion
28(2)
2.10 Type Names Used In Xinu
30(1)
2.11 Operating System Debugging With Kputc And Kprintf
31(1)
2.12 Perspective
32(1)
2.13 Summary
32(5)
Chapter 3 An Overview Of The Hardware And Runtime Environment 37(20)
3.1 Introduction
37(1)
3.2 Physical And Logical Organizations Of A Platform
38(1)
3.3 Instruction Sets
38(1)
3.4 General-purpose Registers
39(2)
3.5 I/O Buses And The Fetch-Store Paradigm
41(1)
3.6 Direct Memory Access
42(1)
3.7 The Bus Address Space
42(1)
3.8 Bus Startup And Configuration
43(1)
3.9 Calling Conventions And The Runtime Stack
44(3)
3.10 Interrupts And Interrupt Processing
47(1)
3.11 Vectored Interrupts
48(1)
3.12 Exception Vectors And Exception Processing
48(1)
3.13 Clock Hardware
49(1)
3.14 Serial Communication
49(1)
3.15 Polled vs. Interrupt-driven 110
49(1)
3.16 Storage Layout
50(1)
3.17 Memory Protection
51(1)
3.18 Hardware Details And A System On Chip Architecture
51(1)
3.19 Perspective
52(1)
3.20 Hardware References
52(5)
Chapter 4 List And Queue Manipulation 57(18)
4.1 Introduction
57(1)
4.2 A Unified Structure For Linked Lists Of Processes
58(1)
4.3 A Compact List Data Structure
59(2)
4.4 Implementation Of The Queue Data Structure
61(1)
4.5 Inline Queue Manipulation Functions
62(1)
4.6 Basic Functions To Extract A Process From A List
63(2)
4.7 FIFO Queue Manipulation
65(3)
4.8 Manipulation Of Priority Queues
68(2)
4.9 List Initialization
70(1)
4.10 Perspective
71(1)
4.11 Summary
72(3)
Chapter 5 Scheduling And Context Switching 75(24)
5.1 Introduction
75(1)
5.2 The Process Table
76(3)
5.3 Process States
79(1)
5.4 Ready And Current States
80(1)
5.5 A Scheduling Policy
80(1)
5.6 Implementation Of Scheduling
81(4)
5.7 Deferred Rescheduling
85(1)
5.8 Implementation Of Context Switching
85(1)
5.9 State Saved In Memory
86(1)
5.10 Context Switch Operation
87(4)
5.11 An Address At Which To Restart A Process
91(1)
5.12 Concurrent Execution And A Null Process
92(1)
5.13 Making A Process Ready And The Scheduling Invariant
93(1)
5.14 Other Process Scheduling Algorithms
94(1)
5.15 Perspective
95(1)
5.16 Summary
95(4)
Chapter 6 More Process Management 99(24)
6.1 Introduction
99(1)
62 Process Suspension And Resumption
99(1)
6.3 Self-suspension And Information Hiding
100(1)
6.4 The Concept Of A System Call
101(2)
6.5 Interrupt Control With Disable And Restore
103(1)
6.6 A System Call Template
104(1)
6.7 System Call Return Values SYSERR And OK
105(1)
6.8 Implementation Of Suspend
105(2)
6.9 Suspending The Current Process
107(1)
6.10 The Value Returned By Suspend
107(1)
6.11 Process Termination And Process Exit
108(3)
6.12 Process Creation
111(4)
6.13 Other Process Manager Functions
115(2)
6.14 Summary
117(6)
Chapter 7 Coordination Of Concurrent Processes 123(20)
7.1 Introduction
123(1)
7.2 The Need For Synchronization
123(2)
7.3 A Conceptual View Of Counting Semaphores
125(1)
7.4 Avoidance Of Busy Waiting
125(1)
7.5 Semaphore Policy And Process Selection
126(1)
7.6 The Waiting State
127(1)
7.7 Semaphore Data Structures
128(1)
7.8 The Wait System Call
129(1)
7.9 The Signal System Call
130(1)
7.10 Static And Dynamic Semaphore Allocation
131(1)
7.11 Example Implementation Of Dynamic Semaphores
132(1)
7.12 Semaphore Deletion
133(2)
7.13 Semaphore Reset
135(1)
7.14 Coordination Across Parallel Processors (Multicore)
136(1)
7.15 Perspective
137(1)
7.16 Summary
137(6)
Chapter 8 Message Passing 143(10)
8.1 Introduction
143(1)
8.2 Two Types Of Message Passing Services
143(1)
8.3 Limits On Resources Used By Messages
144(1)
8.4 Message Passing Functions And State Transitions
145(1)
8.5 Implementation Of Send
146(2)
8.6 Implementation Of Receive
148(1)
8.7 Implementation Of Non-Blocking Message Reception
149(1)
8.8 Perspective
149(1)
8.9 Summary
150(3)
Chapter 9 Basic Memory Management 153(22)
9.1 Introduction
153(1)
9.2 Types Of Memory
153(1)
9.3 Definition Of A Heavyweight Process
154(1)
9.4 Memory Management In Our Example System
155(1)
9.5 Program Segments And Regions Of Memory
156(1)
9.6 Dynamic Memory Allocation
157(1)
9.7 Design Of The Low-level Memory Manager
158(1)
9.8 Allocation Strategy And Memory Persistence
159(1)
9.9 Keeping Track Of Free Memory
159(1)
9.10 Implementation Of Low-level Memory Management
160(1)
9.11 Data Structure Definitions Used With Free Memory
161(1)
9.12 Allocating Heap Storage
162(3)
9.13 Allocating Stack Storage
165(2)
9.14 Releasing Heap And Stack Storage
167(3)
9.15 Perspective
170(1)
9.16 Summary
170(5)
Chapter 10 High-level Memory Management and Virtual Memory 175(20)
10.1 Introduction
175(1)
10.2 Partitioned Space Allocation
176(1)
10.3 Buffer Pools
176(2)
10.4 Allocating A Buffer
178(1)
10.5 Returning Buffers To The Buffer Pool
179(2)
10.6 Creating A Buffer Pool
181(2)
10.7 Initializing The Buffer Pool Table
183(1)
10.8 Virtual Memory And Memory Multiplexing
184(1)
10.9 Real And Virtual Address Spaces
185(1)
10.10 Hardware For Demand Paging
186(1)
10.11 Address Translation With A Page Table
187(1)
10.12 Metadata In A Page Table Entry
188(1)
10.13 Demand Paging And Design Questions
189(1)
10.14 Page Replacement And Global Clock
190(1)
10.15 Perspective
191(1)
10.16 Summary
191(4)
Chapter 11 High-level Message Passing 195(16)
11.1 Introduction
195(1)
11.2 Inter-process Communication Ports
195(1)
11.3 The Implementation Of Ports
196(1)
11.4 Port Table Initialization
197(2)
11.5 Port Creation
199(1)
11.6 Sending A Message To A Port
200(2)
11.7 Receiving A Message From A Port
202(2)
11.8 Port Deletion And Reset
204(3)
11.9 Perspective
207(1)
11.10 Summary
207(4)
Chapter 12 Interrupt Processing 211(22)
12.1 Introduction
211(1)
12.2 The Advantage Of Interrupts
212(1)
12.3 Interrupt Processing
212(1)
12.4 Vectored Interrupts
213(1)
12.5 Integration Of Interrupts And Exceptions
214(1)
12.6 ARM Exception Vectors Using Code
215(4)
12.7 Assignment Of Device Interrupt Vector Numbers
219(1)
12.8 Interrupt Dispatching
220(1)
12.9 The Structure Of Interrupt Software
221(2)
12.10 Disabling Interrupts
223(2)
12.11 Constraints On Functions That Interrupt Code Invokes
225(1)
12.12 The Need To Reschedule During An Interrupt
225(1)
12.13 Rescheduling During An Interrupt
226(1)
12.14 Perspective
227(1)
12.15 Summary
228(5)
Chapter 13 Real-time Clock Management 233(26)
13.1 Introduction
233(1)
13.2 Timed Events
234(1)
13.3 Real-time Clocks And Timer Hardware
234(1)
13.4 Handling Real-time Clock Interrupts
235(1)
13.5 Delay And Preemption
236(1)
13.6 Implementation Of Preemption
237(1)
13.7 Efficient Management Of Delay With A Delta List
238(1)
13.8 Delta List Implementation
239(2)
13.9 Putting A Process To Sleep
241(3)
13.10 Timed Message Reception
244(4)
13.11 Awakening Sleeping Processes
248(1)
13.12 Clock Interrupt Processing
249(2)
13.13 Clock Initialization
251(3)
13.14 Perspective
254(1)
13.15 Summary
255(4)
Chapter 14 Device-independent Input And Output 259(28)
14.1 Introduction
259(1)
14.2 Conceptual Organization Of I/O And Device Drivers
260(1)
14.3 Interface And Driver Abstractions
261(1)
14.4 An Example I/O Interface
262(1)
14.5 The Open-Read-Write-Close Paradigm
263(1)
14.6 Bindings For I/O Operations And Device Names
264(1)
14.7 Device Names In Xinu
265(1)
14.8 The Concept Of A Device Switch Table
265(1)
14.9 Multiple Copies Of A Device And Shared Drivers
266(3)
14.10 The Implementation Of High-level I/O Operations
269(2)
14.11 Other High-level I/O Functions
271(4)
14.12 Open, Close, And Reference Counting
275(2)
14.13 Null And Error Entries In Devtab
277(1)
14.14 Initialization Of The I/O System
278(5)
14.15 Perspective
283(1)
14.16 Summary
283(4)
Chapter 15 An Example Device Driver 287(38)
15.1 Introduction
287(1)
15.2 Serial Communication Using UART Hardware
287(1)
15.3 The Tty Abstraction
288(1)
15.4 Organization Of A fly Device Driver
289(1)
15.5 Request Queues And Buffers
290(1)
15.6 Synchronization Of Upper Half And Lower Half
291(1)
15.7 UART Hardware FIFOs And Driver Design
292(1)
15.8 The Concept Of A Control Block
293(1)
15.9 Try Control Block And Data Declarations
293(3)
15.10 Minor Device Numbers
296(1)
15.11 Upper-half Tty Character Input (ttygetc)
297(1)
15.12 Upper-half Tty Read Function (ttyread)
298(2)
15.13 Upper-half Tty Character Output (ttyputc)
300(1)
15.14 Starting Output (ttykickout)
301(1)
15.15 Upper-half Tty Multiple Character Output (ttywrite)
302(1)
15.16 Lower-half Tty Driver Function (ttyhandler)
303(3)
15.17 Output Interrupt Processing (ttyhandle_out)
306(2)
15.18 Tty Input Processing (ttyhandle_in)
308(7)
15.19 Tty Control Block Initialization (ttyinit)
315(2)
15.20 Device Driver Control (ttycontrol)
317(2)
15.21 Perspective
319(1)
15.22 Summary
320(5)
Chapter 16 DMA Devices And Drivers (Ethernet) 325(32)
16.1 Introduction
325(1)
16.2 Direct Memory Access And Buffers
325(1)
16.3 Multiple Buffers And Rings
326(1)
16.4 An Example Ethernet Driver Using DMA
327(1)
16.5 Device Hardware Definitions And Constants
328(3)
16.6 Rings And Buffers In Memory
331(2)
16.7 Definitions Of An Ethernet Control Block
333(3)
16.8 Device And Driver Initialization
336(7)
16.9 Reading From An Ethernet Device
343(4)
16.10 Writing To An Ethernet Device
347(2)
16.11 Handling Interrupts From An Ethernet Device
349(3)
16.12 Ethernet Control Functions
352(1)
16.13 Perspective
353(1)
16.14 Summary
354(3)
Chapter 17 A Minimal Internet Protocol Stack 357(60)
17.1 Introduction
357(1)
17.2 Required Functionality
358(1)
17.3 Simultaneous Conversations, Timeouts, And Processes
359(1)
17.4 A Consequence Of The Design
359(1)
17.5 ARP Functions
360(11)
17.6 Definition Of A Network Packet
371(2)
17.7 The Network Input Process
373(4)
17.8 Definitions For IP
377(1)
17.9 IP Functions
377(11)
17.10 Definition Of The UDP Table
388(1)
17.11 UDP Functions
389(14)
17.12 Internet Control Message Protocol
403(1)
17.13 Dynamic Host Configuration Protocol
404(8)
17.14 Perspective
412(1)
17.15 Summary
413(4)
Chapter 18 A Remote Disk Driver 417(42)
18.1 Introduction
417(1)
18.2 The Disk Abstraction
417(1)
18.3 Operations A Disk Driver Supports
418(1)
18.4 Block Transfer And High-level I/O Functions
418(1)
18.5 A Remote Disk Paradigm
419(1)
18.6 The Important Concept Of Caching
420(1)
18.7 Semantics Of Disk Operations
421(1)
18.8 Definition Of Driver Data Structures
421(6)
18.9 Driver Initialization (rdsinit)
427(3)
18.10 The Upper-half Open Function (rdsopen)
430(2)
18.11 The Remote Communication Function (rdscomm)
432(3)
18.12 The Upper-half Write Function (rdswrite)
435(3)
18.13 The Upper-half Read Function (rdsread)
438(4)
18.14 Flushing Pending Requests
442(1)
18.15 The Upper-half Control Function (rdscontrol)
442(3)
18.16 Allocating A Disk Buffer (rdsbufalloc)
445(2)
18.17 The Upper-half Close Function (rdsclose)
447(1)
18.18 The Lower-half Communication Process (rdsprocess)
448(5)
18.19 Perspective
453(1)
18.20 Summary
454(5)
Chapter 19 File Systems 459(50)
19.1 What Is A File System?
459(1)
19.2 An Example Set Of File Operations
460(1)
19.3 Design Of A Local File System
461(1)
19.4 Data Structures For The Xinu File System
461(1)
19.5 Implementation Of The Index Manager
462(5)
19.6 Clearing An Index Block (lfibclear)
467(1)
19.7 Retrieving An Index Block (lfibget)
468(1)
19.8 Storing An Index Block (lfibput)
469(2)
19.9 Allocating An Index Block From The Free List (lfiballoc)
471(1)
19.10 Allocating A Data Block From The Free List (lfdballoc)
472(2)
19.11 Using The Device-Independent I/O Functions For Files
474(1)
19.12 File System Device Configuration And Function Names
474(1)
19.13 The Local File System Open Function (lfsopen)
475(8)
19.14 Closing A File Pseudo-Device (lflclose)
483(1)
19.15 Flushing Data To Disk (lfflush)
483(3)
19.16 Bulk Transfer Functions For A File (lflwrite, lflread)
486(2)
19.17 Seeking To A New Position In the File (lflseek)
488(1)
19.18 Extracting One Byte From A File (lflgetc)
489(1)
19.19 Changing One Byte In A File (lflputc)
490(2)
19.20 Loading An Index Block And A Data Block (lfsetup)
492(4)
19.21 Master File System Device Initialization (lfsinit)
496(1)
19.22 Pseudo-Device Initialization (lflinit)
497(2)
19.23 File Truncation (lftruncate)
499(2)
19.24 Initial File System Creation (lfscreate)
501(2)
19.25 Perspective
503(1)
19.26 Summary
504(5)
Chapter 20 A Remote File Mechanism 509(38)
20.1 Introduction
509(1)
20.2 Remote File Access
509(1)
20.3 Remote File Semantics
510(1)
20.4 Remote File Design And Messages
510(8)
20.5 Remote File Server Communication (rfscomm)
518(2)
20.6 Sending A Basic Message (rfsndmsg)
520(2)
20.7 Network Byte Order
522(1)
20.8 A Remote File System Using A Device Paradigm
522(2)
20.9 Opening A Remote File (rfsopen)
524(3)
20.10 Checking The File Mode (rfsgetmode)
527(1)
20.11 Closing A Remote File (rflclose)
528(1)
20.12 Reading From A Remote File (rfiread)
529(3)
20.13 Writing To A Remote File (rfiwrite)
532(3)
20.14 Seeking On A Remote File (rflseek)
535(1)
20.15 Character I/O On A Remote File (rflgetc, rflputc)
536(1)
20.16 Remote File System Control Functions (rfscontrol)
537(4)
20.17 Initializing The Remote File System (rfsinit, rflinit)
541(2)
20.18 Perspective
543(1)
20.19 Summary
543(4)
Chapter 21 A Syntactic Namespace 547(26)
21.1 Introduction
547(1)
21.2 Transparency And A Namespace Abstraction
547(1)
21.3 Myriad Naming Schemes
548(2)
21.4 Naming System Design Alternatives
550(1)
21.5 Thinking About Names Syntactically
550(1)
21.6 Patterns And Replacements
551(1)
21.7 Prefix Patterns
551(1)
21.8 Implementation Of A Namespace
552(1)
21.9 Namespace Data Structures And Constants
552(1)
21.10 Adding Mappings To The Namespace Prefix Table
553(2)
21.11 Mapping Names With The Prefix Table
555(4)
21.12 Opening A Named File
559(1)
21.13 Namespace Initialization
560(2)
21.14 Ordering Entries In The Prefix Table
562(1)
21.15 Choosing A Logical Namespace
563(1)
21.16 A Default Hierarchy And The Null Prefix
564(1)
21.17 Additional Object Manipulation Functions
564(2)
21.18 Advantages And Limits Of The Namespace Approach
566(1)
21.19 Generalized Patterns
566(1)
21.20 Perspective
567(1)
21.21 Summary
568(5)
Chapter 22 System Initialization 573(16)
22.1 Introduction
573(1)
22.2 Bootstrap: Starting From Scratch
573(1)
22.3 An Example Of Booting Over A Network
574(1)
22.4 Operating System Initialization
575(1)
22.5 Xinu Initialization
576(3)
22.6 Xinu System Startup
579(4)
22.7 Transforming A Program Into A Process
583(1)
22.8 Perspective
584(1)
22.9 Summary
584(5)
Chapter 23 Subsystem Initialization And Memory Marking 589(14)
23.1 Introduction
589(1)
23.2 Self-initializing Modules
590(1)
23.3 Self-initializing Modules In A Concurrent System
591(2)
23.4 Self-initialization In The Presence Of Reboot
593(1)
23.5 Initialization Using Accession Numbers
593(2)
23.6 A Generalized Memory Marking Scheme
595(1)
23.7 Data Declarations For The Memory Marking System
596(2)
23.8 Implementation Of Marking
598(1)
23.9 Perspective
599(1)
23.10 Summary
599(4)
Chapter 24 Exception Handling 603(8)
24.1 Introduction
603(1)
24.2 Terminology: Faults, Checks, Traps, And Exceptions
603(1)
24.3 Vectored Exceptions And Maskable Interrupts
604(1)
24.4 Types Of Exceptions
604(1)
24.5 Handling Exceptions
605(1)
24.6 Exception Vector Initialization
606(1)
24.7 Panic In The Face Of Catastrophic Problems
606(1)
24.8 Implementation Of Panic
607(1)
24.9 Perspective
607(1)
24.10 Summary
608(3)
Chapter 25 System Configuration 611(10)
25.1 Introduction
611(1)
25.2 The Need For Multiple Configurations
611(2)
25.3 Configuration In Xinu
613(1)
25.4 Contents Of The Xinu Configuration File
613(3)
25.5 Computation Of Minor Device Numbers
616(1)
25.6 Steps In Configuring A Xinu System
616(1)
25.7 Perspective
617(1)
25.8 Summary
617(4)
Chapter 26 An Example User Interface: The Xinu Shell 621(32)
26.1 Introduction
621(1)
26.2 What Is A User Interface?
622(1)
26.3 Commands And Design Principles
622(1)
26.4 Design Decisions For A Simplified Shell
623(1)
26.5 Shell Organization And Operation
623(1)
26.6 The Definition Of Lexical Tokens
624(1)
26.7 The Definition Of Command-Line Syntax
625(1)
26.8 Implementation Of The Xinu Shell
625(3)
26.9 Storage Of Tokens
628(1)
26.10 Code For The Lexical Analyzer
629(4)
26.11 The Heart Of The Command Interpreter
633(8)
26.12 Command Name Lookup And Builtin Processing
641(1)
26.13 Arguments Passed To Commands
641(2)
26.14 Passing Arguments To A Non-builtin Command
643(3)
26.15 I/O Redirection
646(1)
26.16 An Example Command Function (sleep)
647(2)
26.17 Perspective
649(1)
26.18 Summary
650(3)
Appendix 1 Porting An Operating System 653(10)
A1.1 Introduction
653(1)
A1.2 Motivation: Evolving Hardware
654(1)
A1.3 Steps Taken When Porting An Operating System
654(6)
A1.4 Programming To Accommodate Change
660(2)
A1.5 Summary
662(1)
Appendix 2 Xinu Design Notes 663(6)
A2.1 Introduction
663(1)
A2.2 Overview
663(1)
A2.3 Xinu Characteristics
664(1)
A2.4 Xinu Implementation
665(2)
A2.5 Major Concepts And Implementation
667(2)
Index 669
Douglas Comer
Biežāk uzdotie jautājumi par e-grāmatām Biežāk uzdotie jautājumi par e-grāmatām
Permanent link: https://www.kriso.lv/db/97814987124462e.html
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