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E-grāmata: Organic Thin-Film Transistor Applications: Materials to Circuits

(Indian Institute of Technology-Roorkee, India), , ,
  • Formāts: 371 pages
  • Izdošanas datums: 15-Sep-2016
  • Izdevniecība: CRC Press Inc
  • Valoda: eng
  • ISBN-13: 9781498736558
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Organic Thin-Film Transistor Applications: Materials to CircuitsPalielināt
  • Formāts: 371 pages
  • Izdošanas datums: 15-Sep-2016
  • Izdevniecība: CRC Press Inc
  • Valoda: eng
  • ISBN-13: 9781498736558
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Kumar and colleagues offer a comprehensive review of the theory behind organic electronics, considering recent aspects from materials to device physics. Their topics include analytical modeling and parameter extraction of top and bottom contact structure of organic thin-film transistors, the impact of semiconductors and dielectric thickness on the performance of top and bottom contact organic thin-film transistors, organic light-emitting transistors, digital circuit designs based o single and dual gate organic thin-film transistors using diode load logic and zero-Vgs load logic configurations, and applications and future perspectives. Annotation ©2016 Ringgold, Inc., Portland, OR (protoview.com)

Text provides information about advanced OTFT (Organic thin film transistor) structures, their modeling and extraction of performance parameters, materials of individual layers, their molecular structures, basics of pi-conjugated semiconducting materials and their properties, OTFT charge transport phenomena and fabrication techniques. It includes applications of OTFTs such as single and dual gate OTFT based inverter circuits along with bootstrap techniques, SRAM cell designs based on different material and circuit configurations, light emitting diodes (LEDs). Besides this, application of dual gate OTFT in the logic gate, shift register, Flip-Flop, counter circuits will be included as well.

Recenzijas

"The book covers both the fundamental aspects of the operating principles of organic electronic devices, as well as their applications in digital circuit design. The book is written in an attractive textbook format with problems at the end of each chapter making the book suitable as a textbook in both undergraduate and graduate level courses. This book will be an excellent addition to university library collections." Christine Luscombe, University of Washington, USA

Preface xiii
Authors xvii
Section I Organic Device Physics and Modeling
Chapter 1 Introduction
3(10)
1.1 Introduction
3(1)
1.2 Organic Semiconductor Materials for Organic Devices
4(2)
1.2.1 Polymers
5(1)
1.2.2 Small Molecules
5(1)
1.2.3 Semiconductor Blends
6(1)
1.3 Organic Thin-Film Transistors (OTFTs)
6(2)
1.3.1 Operating Principle
7(1)
1.4 Future Perspectives
8(1)
1.5 Scope of the Book
9(1)
Problems
10(1)
Multiple Choice
10(1)
Short Answer
10(1)
References
11(2)
Chapter 2 OTFT Parameters, Structures, Models, Materials, Fabrication, and Applications: A Review
13(54)
2.1 Introduction
13(1)
2.2 Parameters of Organic Thin-Film Transistors (OTFTs)
14(3)
2.2.1 Mobility
14(1)
2.2.2 Threshold Voltage
15(1)
2.2.3 On/Off Current Ratio
16(1)
2.2.4 Subthreshold Slope
16(1)
2.3 OTFT Structures
17(7)
2.3.1 Single Gate Structure
17(2)
2.3.2 Dual Gate Structure
19(1)
2.3.3 Vertical Channel Structure
20(3)
2.3.4 Cylindrical Gate Structure
23(1)
2.4 OTFT Models
24(4)
2.4.1 Compact Direct Current (DC) Model
24(1)
2.4.2 Charge Drift Model
25(1)
2.4.3 Charge Drift Model for Subthreshold Region
26(2)
2.5 Charge Transport in Organic Semiconductors
28(3)
2.5.1 Variable Range Hopping (VRH) Model
29(1)
2.5.2 Multiple Trapping and Release (MTR) Model
30(1)
2.5.3 Polaron Model
31(1)
2.6 Materials
31(13)
2.6.1 Organic Semiconductors
32(7)
2.6.1.1 p-Type
32(3)
2.6.1.2 n-Type
35(4)
2.6.2 Electrode Materials
39(2)
2.6.3 Gate Dielectric Materials
41(2)
2.6.4 Substrate Materials
43(1)
2.7 Fabrication
44(8)
2.7.1 Physical Vapor Deposition (PVD) Techniques
45(3)
2.7.1.1 Thermal Vacuum Evaporation Techniques
45(2)
2.7.1.2 Sputtering Techniques
47(1)
2.7.2 Solution Processing Techniques
48(2)
2.7.2.1 Spin Coating
48(1)
2.7.2.2 Dip Coating
49(1)
2.7.2.3 Inkjet Printing/Screen Printing
49(1)
2.7.3 Chemical Vapor Deposition Technique
50(2)
2.8 Performance-Influencing Factors of OTFTs
52(2)
2.8.1 Dimensional Parameters
52(1)
2.8.2 Contact—Semiconductor Interface
53(1)
2.8.3 Semiconductor—Dielectric Interface
53(1)
2.9 Concluding Remarks
54(2)
Problems
56(1)
Multiple Choice
56(2)
Short Answer
58(1)
Descriptive Answer
58(1)
Exercises
59(1)
References
60(7)
Chapter 3 Analytical Modeling and Parameter Extraction of Top and Bottom Contact Structures of Organic Thin-Film Transistors
67(20)
3.1 Introduction
67(1)
3.2 Device Structure and Contact Effects
68(3)
3.3 Analytical Models of Organic Thin-Film Transistors (OTFTs)
71(5)
3.3.1 Model for Gate—Contact Overlap Region
71(3)
3.3.2 Model for Current in Linear and Saturation Region
74(2)
3.4 Differential Method for Parameter Extraction
76(3)
3.5 Results and Discussion
79(2)
3.6 Concluding Remarks
81(1)
Problems
82(1)
Multiple Choice
82(1)
Short Answer
83(1)
Exercises
84(1)
References
85(2)
Chapter 4 Impact of Semiconductor and Dielectric Thicknesses on the Performance of Top and Bottom Contact Organic Thin-Film Transistors
87(32)
4.1 Introduction
87(2)
4.2 Process/Device Simulation Tool and Simulation Conditions
89(11)
4.2.1 Simulation Setup
89(2)
4.2.2 Device Simulation Steps
91(4)
4.2.2.1 Defining Structural Dimensions and Mesh Specifications
91(1)
4.2.2.2 Defining Material Parameters and Application of the Appropriate Physical Models
92(2)
4.2.2.3 Operational Bias Conditions and Run the Simulation
94(1)
4.2.3 Performance Parameter Extraction
95(5)
4.3 Electrical Characteristics and Parameters of Top Contact and Bottom Contact Organic Thin-Film Transistors
100(2)
4.4 Impact of tosc and tox on Performance Parameters of Top Contact and Bottom Contact Organic Thin-Film Transistors
102(6)
4.5 Contact Resistance Extraction
108(4)
4.5.1 Contact Resistance Analysis in Top Contact Structure
108(2)
4.5.2 Contact Resistance Analysis in Bottom Contact Structure
110(2)
4.6 Concluding Remarks
112(1)
Problems
113(1)
Multiple Choice
113(1)
Short Answer
114(1)
Exercises
115(1)
References
116(3)
Chapter 5 Organic Light-Emitting Transistors
119(36)
5.1 Introduction
119(1)
5.2 Working Principle
120(1)
5.3 Materials for Organic Light-Emitting Transistor (OLET) Layers
121(8)
5.3.1 Organic Active Materials
121(3)
5.3.1.1 Small Molecules and Oligomers
122(1)
5.3.1.2 Polymers
122(2)
5.3.2 Gate Dielectrics
124(2)
5.3.3 Electrodes
126(3)
5.4 Classification of OLETs
129(12)
5.4.1 Classification Based on Charge Carriers
129(5)
5.4.1.1 Unipolar OLETs
129(2)
5.4.1.2 Ambipolar OLETs
131(3)
5.4.2 Classification Based on Biasing Conditions
134(6)
5.4.2.1 Direct Current (DC) Gated OLETs
134(2)
5.4.2.2 Alternating Current (AC) Gated Ambipolar OLETs
136(4)
5.4.3 Classification Based on Architecture
140(16)
5.4.3.1 Planar OLETs
140(1)
5.4.3.2 Vertical OLETs
140(1)
5.5 Standard Terms and Properties of Light Emission in Organic Semiconductors
141(4)
5.6 Comparison of Organic Light-Emitting Transistors with Conventional Organic Light-Emitting Diodes
145(1)
Problems
146(1)
Multiple Choice
146(1)
Short Answer
147(1)
References
148(7)
Section II Organic Device Applications
Chapter 6 Static and Dynamic Analysis of Organic All-p, Organic Complementary, and Hybrid Complementary Inverter Circuits
155(28)
6.1 Introduction
155(1)
6.2 Analysis of Different p- and n-Type Devices
156(9)
6.2.1 p-Type Organic Thin-Film Transistors (OTFTs)
157(3)
6.2.1.1 Pentacene-Based p-Type OTFT
157(1)
6.2.1.2 CuPc-Based p-Type OTFT
158(2)
6.2.2 n-Type OTFTs
160(2)
6.2.2.1 F16CuPc-Based n-Type OTFT
160(1)
6.2.2.2 C60-Based n-Type OTFT
161(1)
6.2.3 n-Type Inorganic TFTs
162(3)
6.2.3.1 a-Si:H—Based n-Type Inorganic TFT
163(1)
6.2.3.2 ZnO-Based n-Type Inorganic TFT
164(1)
6.3 Analysis of Inverter Circuits with Different TFT Combinations
165(9)
6.3.1 Fully Organic Complementary Inverter Circuits
169(2)
6.3.2 Hybrid Complementary Inverter Circuits
171(1)
6.3.3 All p-Type Organic Inverter Circuit
172(2)
6.4 Results and Discussion
174(2)
6.5 Concluding Remarks
176(1)
Problems
177(1)
Multiple Choice
177(1)
Short Answer
178(1)
Exercises
179(1)
References
180(3)
Chapter 7 Robust Organic Inverters and NAND/NOR Logic Circuits Based on Single and Dual Gate OTFTs
183(34)
7.1 Introduction
183(1)
7.2 Single and Dual Gate Device Analysis
184(6)
7.3 Diode Load Logic (DLL) and Zero-Vgs Load Logic (ZVLL) Configurations
190(1)
7.4 Organic Inverter Circuits
190(4)
7.5 Improvement in Performance of Organic Dual Gate Inverters
194(7)
7.5.1 Organic Inverter Circuits with Back-Gate Biasing
195(4)
7.5.2 Organic Bootstrap Inverter Circuits
199(2)
7.6 Organic NAND Logic Gate
201(4)
7.7 Organic NOR Logic Gate
205(3)
7.8 Concluding Remarks
208(2)
Problems
210(1)
Multiple Choice
210(1)
Short Answer
211(1)
Exercises
211(2)
References
213(4)
Chapter 8 Digital Circuit Designs Based on Single and Dual Gate Organic Thin-Film Transistors Using Diode Load Logic and Zero-Vgs Load Logic Configurations
217(24)
8.1 Introduction
217(2)
8.2 Combinational Circuit Designs
219(1)
8.2.1 SG-Based 2-to-1 Multiplexer Design in DLL and ZVLL Configurations
219(1)
8.3 Clocked Sequential Circuit Designs Based on SG and DG OTFTs
220(16)
8.3.1 SR Latch Implementations
221(5)
8.3.1.1 SG-Based SR Latch Designs in DLL and ZVLL Configurations
222(2)
8.3.1.2 DG-Based SR Latch Designs in DLL and ZVLL Configurations
224(2)
8.3.2 D-Latch Implementations
226(3)
8.3.2.1 SG-Based D-Latch Designs in DLL and ZVLL Configurations
226(2)
8.3.2.2 DG-Based D-Latch Designs in DLL and ZVLL Configurations
228(1)
8.3.3 JK Latch Implementations
229(4)
8.3.3.1 SG-Based JK Latch Designs in DLL and ZVLL Configurations
230(2)
8.3.3.2 DG-Based JK Latch Designs in DLL and ZVLL Configurations
232(1)
8.3.4 T-Latch Implementations
233(12)
8.3.4.1 SG-Based T-Latch Designs in DLL and ZVLL Configurations
234(1)
8.3.4.2 DG-Based T-Latch Designs in DLL and ZVLL Configurations
235(1)
8.4 Concluding Remarks
236(1)
Problems
237(1)
Multiple Choice
237(2)
Short Answer
239(1)
References
239(2)
Chapter 9 Static Random Access Memory Cell Design Based on All-p Organic, Hybrid, and Complementary Organic Thin-Film Transistors
241(26)
9.1 Introduction
241(2)
9.2 Static Random Access Memory (SRAM) Cell Configuration
243(2)
9.3 Performance of SRAM Cell with Different Thin-Film Transistor Combinations
245(13)
9.3.1 Static Noise Margin
245(4)
9.3.2 Read Operation
249(5)
9.3.3 Write Operation
254(4)
9.4 Complementary SRAM Cell with p-Type Access Transistors
258(3)
9.5 Concluding Remarks
261(1)
Problems
262(1)
Multiple Choice
262(2)
Short Answer
264(1)
Exercises
264(1)
References
265(2)
Chapter 10 Applications and Future Perspectives
267(28)
10.1 Organic Device Applications
267(18)
10.1.1 Digital Logic Circuits
267(2)
10.1.2 Analog and Mixed Signal Circuits
269(2)
10.1.3 Memory Circuits
271(1)
10.1.4 Light-Emitting Diodes and Transistors
272(2)
10.1.5 Radio Frequency Identification (RFID) Tags
274(2)
10.1.6 Sensors
276(3)
10.1.7 Spintronics
279(3)
10.1.8 Organic Solar Cells
282(3)
10.1.8.1 Historical Background of Organic Solar Cells
282(1)
10.1.8.2 Operating Principle of Organic Solar Cells
283(1)
10.1.8.3 Bulk Heterojunction Solar Cell
284(1)
10.2 Future Perspectives
285(4)
10.2.1 Novel Materials and Structures
286(1)
10.2.2 Optimization of Device Performance
287(1)
10.2.3 Analytical Models
287(1)
10.2.4 Environmental Device Stability
288(1)
References
289(6)
Appendix A: Simulation Examples 295(50)
Index 345
Brajesh Kumar Kaushik (SM13) received the B.Tech. degree in Electronics and Communication Engineering from D.C.R. University of Science and Technology, Murthal, Haryana, in 1994, the M. Tech. degree from Dayalbagh Educational Institute, Agra, India, in 1997, and the Ph.D. degree under AICTE-QIP scheme from Indian Institute of Technology, Roorkee, India, in 2007.He was with Vinytics Peripherals Pvt. Ltd., Delhi, as Research & Development Engineer in Microprocessor, Microcontroller, and DSP processor-based systems. He joined the Department of Electronics and Communication Engineering, G. B. Pant Engineering College, Pauri Garhwal, India, as a Lecturer in July 1998, where later he became an Assistant Professor from May 2005 to May 2006 and an Associate Professor from May 2006 to Dec., 2009. He is currently serving as an Associate Professor in the Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, India. Dr. Kaushik has received many awards and recognitions from International Biographical Center (IBC), Cambridge, etc. His name has been listed in Marquis Whos Who in Science and Engineering and Marquis Whos Who in the World, USA. He is a Senior Member of IEEE and his current research interests includes high speed interconnects, low power VLSI design, carbon nanotube-based designs, organic thin film transistor design and modelling, and spintronics-based devices and circuits.
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