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E-grāmata: Physical Biometrics for Hardware Security of DSP and Machine Learning Coprocessors

(Indian Institute of Technology (IIT) Indore, Department of Computer Science and Engineering, India)
  • Formāts: EPUB+DRM
  • Sērija : Materials, Circuits and Devices
  • Izdošanas datums: 10-May-2023
  • Izdevniecība: Institution of Engineering and Technology
  • Valoda: eng
  • ISBN-13: 9781839538223
  • Formāts - EPUB+DRM
  • Cena: 187,84 €*
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  • Formāts: EPUB+DRM
  • Sērija : Materials, Circuits and Devices
  • Izdošanas datums: 10-May-2023
  • Izdevniecība: Institution of Engineering and Technology
  • Valoda: eng
  • ISBN-13: 9781839538223

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This book presents the state-of-the art in hardware security of digital signal processing (DSP) and machine learning coprocessors using physical biometrics and molecular signature biometrics, for an audience of academic researchers, industry researchers and developers, and advanced students with an interest in the field.



Physical Biometrics for Hardware Security of DSP and Machine Learning Coprocessors presents state-of-the art explanations for detective control-based security and protection of digital signal processing (DSP) and machine learning coprocessors against hardware threats. Such threats include intellectual property (IP) abuse and misuse, for example, fraudulent claims of IP ownership and IP piracy. DSP coprocessors such as finite impulse response filters, image processing filters, discrete Fourier transform, and JPEG compression hardware are extensively utilized in several real-life applications. Further, machine learning coprocessors such as convolutional neural network (CNN) hardware IP cores play a vital role in several applications such as face recognition, medical imaging, autonomous driving, and biometric authentication, amongst others.

Written by an expert in the field, this book reviews recent advances in hardware security and IP protection of digital signal processing (DSP) and machine learning coprocessors using physical biometrics and DNA. It presents solutions for secured coprocessors for DSP, image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods.

The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource.

  • Chapter 1: Introduction: secured co-processors for machine learning and DSP applications using biometrics
  • Chapter 2: Integrated defense using structural obfuscation and encrypted DNA-based biometric for hardware security
  • Chapter 3: Facial signature-based biometrics for hardware security and IP core protection
  • Chapter 4: Secured convolutional layer hardware co-processor in convolutional neural network (CNN) using facial biometric
  • Chapter 5: Handling symmetrical IP core protection and IP protection (IPP) of Trojan-secured designs in HLS using physical biometrics
  • Chapter 6: Palmprint biometrics vs. fingerprint biometrics vs. digital signature using encrypted hash: qualitative and quantitative comparison for security of DSP coprocessors
  • Chapter 7: Secured design flow using palmprint biometrics, steganography, and PSO for DSP coprocessors
  • Chapter 8: Methodology for exploration of security-design cost trade-off for signature-based security algorithms
  • Chapter 9: Taxonomy of hardware security methodologies: IP core protection and obfuscation
Anirban Sengupta is an associate professor in the Discipline of Computer Science and Engineering at Indian Institute of Technology (IIT) Indore. He has around 270 publications and patents, 50 book chapters and 5 books. He is a recipient of awards/honors such as Fellow of IET, Fellow of British Computer Society, Fellow of IETE, IEEE Chester Sall Memorial Consumer Electronics Award, IEEE Distinguished Lecturer, IEEE Distinguished Visitor, IEEE CESoc Outstanding Editor Award, IEEE CESoc Best Research Award from CEM, Best Research paper Award in IEEE ICCE 2019, IEEE Computer Society TCVLSI Outstanding Editor Award and IEEE TCVLSI Best Paper Award in IEEE iNIS 2017. He held/holds around 17 Editorial positions in IEEE/IET Journals. He is the Editor-in-Chief of IEEE VCAL (Computer Society TCVLSI), Deputy EiC of IET Computers & Digital Techniques and General Chair of 37th IEEE Int'l Conference on Consumer Electronics (ICCE) 2019, Las Vegas. He is consistently ranked in Stanford University's Top 2% Scientists globally across all domains.