As demand for on-chip functionalities and requirements for low power operation continue to increase as a result of the emergence in mobile, wearable and internet-of-things (IoT) products, 3D/2.5D have been identified as an inevitable path moving forward. As circuits become more and more complex, especially three-dimensional ones, new insights have to be developed in many domains, including electrical, thermal, noise, interconnects, and parasites. It is the entanglement of such domains that begins the very key challenge as we enter in 3D nano-electronics. This book aims to develop this new paradigm, going to a synthesis beginning between many technical aspects.
| Preface |
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ix | |
| Acknowledgments |
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xi | |
| Authors |
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xiii | |
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1 | (12) |
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1.1 From Two-Dimension (2D) IC to Three-Dimension (3D) IC |
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1 | (3) |
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1.2 Roadmap of 3D Integrated Circuits |
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4 | (3) |
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7 | (6) |
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2 Substrate Noise in Mixed-Signal ICs in a Silicon Process |
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13 | (34) |
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13 | (1) |
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2.2 Ground and Substrate Noise Mechanisms |
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14 | (1) |
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2.3 Substrate Noise Propagation in Low- or High-Resistivity Silicon Substrate |
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15 | (2) |
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17 | (7) |
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2.4.1 Ground and Substrate Noise Modeling |
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17 | (1) |
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18 | (1) |
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2.4.2.1 Application Developed for Ground and Power-Supply Bounce Effects |
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18 | (2) |
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2.4.2.2 Application Developed for Substrate Extraction |
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20 | (1) |
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2.4.3 Basic Rules to Reduce Digital Power-Supply Network Ringing |
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21 | (3) |
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2.5 Comparative Substrate Isolation Study on a Virtual Test Case Study |
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24 | (2) |
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2.6 Application to a Mixed-Signal IC |
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26 | (6) |
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2.6.1 Test-Chip Presentation |
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26 | (2) |
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2.6.2 Substrate Noise Reduction: Low-Noise Version |
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28 | (1) |
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2.6.3 Voltage-Controlled Oscillator Spectrum in Normal and Low-Noise Version |
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29 | (3) |
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2.7 Impact of Low-Frequency Substrate Perturbations on an RF VCO Spectrum |
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32 | (12) |
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2.7.1 VCO Structure and Its Layout |
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32 | (2) |
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2.7.2 VCO Characterization |
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34 | (2) |
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2.7.3 VCO Spurious Side-Bands Involved by Bias Harmonic Perturbations |
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36 | (1) |
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2.7.4 VCO Spurious Side-Bands Involved by Substrate Harmonic Perturbations |
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37 | (1) |
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2.7.5 Analysis of Substrate Coupling Mechanisms by Means of the ISF Approach |
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38 | (1) |
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38 | (6) |
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44 | (3) |
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3 Efficient and Simple Compact Modeling of Interconnects |
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47 | (50) |
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3.1 Introduction: Overview of the 3D Interconnect Modeling Approach |
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47 | (3) |
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3.2 Presentation of Some Structures |
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50 | (3) |
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3.3 Compact Models of the Medium-TSV and the Coplanar Line |
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53 | (17) |
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3.3.1 3D Transmission Line Extractor 3D-TLE |
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56 | (1) |
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3.3.2 Modeling Approach Validation and Test Structures' RF Behaviors |
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57 | (4) |
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3.3.2.1 High-Resistive Substrate Study |
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61 | (1) |
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3.3.2.2 Transient Study--Eye Diagram |
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61 | (9) |
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3.4 TSV Models' Parasitic Extraction |
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70 | (25) |
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3.4.1 Characterization and Parameter Extraction of Two TSV Model |
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70 | (10) |
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3.4.2 Simulation and Optimization of 2 TSVs U model |
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80 | (6) |
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86 | (1) |
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3.4.3.1 Study of Signal Integrity in TSV Matrices |
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86 | (1) |
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3.4.4 Electrical Modeling Result of 3D IC |
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87 | (1) |
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3.4.4.1 Case I: Electrical Modeling of 3xRLC Segments Model |
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87 | (2) |
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3.4.4.2 Case Us CPW (Coplanar Wave Model) |
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89 | (2) |
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3.4.4.3 Case W Two TSVs U model |
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91 | (4) |
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95 | (2) |
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4 Electrothermal Modeling of Substrates |
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97 | (72) |
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97 | (1) |
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4.2 Substrate Modeling Approach |
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98 | (19) |
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98 | (1) |
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4.2.2 Substrate Analytical Modeling |
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98 | (6) |
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4.2.2.1 Results Using Green/TLM/FEM Methods |
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104 | (13) |
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117 | (30) |
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4.3.1 Typical Simulation Results |
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121 | (1) |
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4.3.2 Thermal Connection Modeling |
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122 | (2) |
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4.3.2.1 3D IC Heat Transfer Compact Model without TSV |
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124 | (1) |
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4.3.2.2 3D IC Heat Transfer Compact Model Considering TSV |
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125 | (10) |
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4.3.2.3 Electrothermal (ET) Modeling of VLSI Circuits |
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135 | (12) |
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147 | (18) |
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4.4.1 2D Modeling Approach |
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149 | (1) |
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4.4.1.1 2D Heat Pipe Analytical Solution |
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150 | (8) |
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158 | (3) |
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161 | (4) |
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4.4.2.1 Results and Discussion |
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165 | (1) |
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165 | (4) |
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5 Substrate Noise and Parasites: Toward 3D |
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169 | (44) |
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169 | (5) |
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5.2 Noise Calculation Methods |
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174 | (17) |
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174 | (5) |
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5.2.2 The Impedance Field Method |
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179 | (6) |
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5.2.3 Transfer Impedance Method |
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185 | (6) |
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5.3 Digital Perturbations |
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191 | (11) |
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191 | (1) |
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191 | (8) |
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5.3.2.1 Numerical Experiences and Discussion |
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199 | (3) |
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202 | (9) |
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211 | (2) |
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213 | (2) |
| References |
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215 | (10) |
| Index |
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225 | |
MA Yue has got engineers and masters degrees in electrical and computer engineering from the Ecole Centrale de Pékin and Beihang university, respectively His PhD, obtained at the Institute des Nanotechnologies de Lyon (INL) in the university of Lyon, INSA, France, concerns the field of micro-electronics: First and second order electro-thermal parameters for3D circuits .His scientific interests include mathematics modeling, integrated circuits and systems, and computer-aided IC design, with theatrical and practical issues in numerical simulation methods, applied especially to 3D ICs. He..
Christian GONTRAND was born in Montpellier, France, on February 21, 1955.
He received the M.S, Ph.D and "State Doctorat" (Habilitation Diploma) degree, respectively in 1977, 1982 and 1987, in electronics, from the Université des Sciences et Techniques du Languedoc, Montpellier , France.
From 1982 to 1984, He has been working with the Thomson "Laboratoire Central de Recherche"(LCR), Orsay, where his areas of interest included theoretical (electrical transport) and experimental (noise) of microwave devices (TEGFETs/HEMTs).
From 1988, he joined the laboratoire de Physique de la Matičre (LPM/INSA), Villeurbanne, as a Research Assistant Professor. From 1988 to 1996, He had the technical chargeof the new "Centre de Microélectronique de la Région Lyonnaise" (CIMIRLY), and worked on new RF compatible silicon devices, in collaboration with the Centre National des Etudes en Telecommunication (CNET), Meylan,France.
From 1997 to 2001, as a Professor in semiconductor devices and circuits, he was at the head of the team "Smart System Integration", at the "Centre de Génie Electrique de Lyon" (CEGELY/AMPERE). From 2002, he was at the Head of the axis "Radiofrequency Devices, Circuits and Systems" of DE team of the Lyon Institute of Nanotechnology, dealing with noises or parasitic disturbances in mixed complex 2D and 3D RF circuits and systems.
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