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E-grāmata: Principles of Synchronous Digital Hierarchy

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(formerly West Central Railways, Jabalpur, India)
  • Formāts: 555 pages
  • Izdošanas datums: 03-Oct-2018
  • Izdevniecība: CRC Press Inc
  • Valoda: eng
  • ISBN-13: 9781351832243
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Principles of Synchronous Digital HierarchyPalielināt
  • Formāts: 555 pages
  • Izdošanas datums: 03-Oct-2018
  • Izdevniecība: CRC Press Inc
  • Valoda: eng
  • ISBN-13: 9781351832243
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"The book presents the current standards of digital multiplexing, called synchronous digital hierarchy, including analog multiplexing technologies. It is aimed at telecommunication professionals who want to develop an understanding of digital multiplexing and synchronous digital hierarchy in particular and the functioning of practical telecommunication systems in general. The text includes all relevant fundamentals and provides a handy reference for problem solving or defining operations and maintenance strategies. The author covers digital conversion and TDM principles, line coding and digital modulation, signal impairments, and synchronization, as well as emerging systems"--

Chief signal engineer for Indian Railways, Jain has compiled for the benefit of other engineers the information he gathered for himself to learn about synchronous digital hierarchy technology and telecommunications systems based on it. His topics include the advent of digital technology, line coding and digital modulation, plesiochronous digital hierarchy, architecture and protection mechanisms, and emerging systems and the future of synchronous digital hierarchy. Annotation ©2012 Book News, Inc., Portland, OR (booknews.com)

The book presents the current standards of digital multiplexing, called synchronous digital hierarchy, including analog multiplexing technologies. It is aimed at telecommunication professionals who want to develop an understanding of digital multiplexing and synchronous digital hierarchy, in particular, and the functioning of practical telecommunication systems, in general. The text includes all relevant fundamentals and provides a handy reference for problem solving or defining operations and maintenance strategies. The author covers digital conversion and TDM principles, line coding and digital modulation, signal impairments, and synchronization, as well as emerging systems.

Recenzijas

".. one of the best book for practicing engineers in the field of OFC based SDH systems." S.K. Biswas, Chief Communication Engineer, Western Railway, Mumbai, India

Preface xix
Author xxiii
1 Introduction
1(18)
1.1 You and Me
1(1)
1.2 "Mr. Watson, Come Here. I Want to See You."
1(1)
1.3 Technology of the Telephone
2(4)
1.3.1 Transmitter
3(1)
1.3.2 Receiver
4(1)
1.3.3 Metallic Wires
4(2)
1.4 Telephone Exchanges
6(2)
1.4.1 Manual Exchange
6(1)
1.4.2 Automatic Exchanges
7(1)
1.5 Long-Distance Communication
8(1)
1.6 Need for Multiplexing
9(1)
1.7 Techniques of Multiplexing
9(2)
1.8 Multiplexing Structure of FDM Schemes
11(2)
1.9 Capacities of Various Analog (FDM) Multiplexing Systems
13(1)
1.9.1 Copper Wire Pairs
13(1)
1.9.2 Coaxial Cables
13(1)
1.9.3 Microwave Systems
13(1)
1.10 Digital Multiplexing
14(5)
1.10.1 Plesiochronous Digital Hierarchy
14(1)
1.10.2 Synchronous Digital Hierarchy
15(1)
1.10.3 Coarse Wavelength Division Multiplexing
15(1)
1.10.4 Dense Wavelength Division Multiplexing
16(1)
1.10.5 Optical Transport Network
16(1)
Review Questions
16(1)
Critical Thinking Questions
17(1)
Bibliography
17(2)
2 Advent of Digital Technology
19(22)
2.1 Analog Communication Systems
19(1)
2.2 Problems in Analog Communication Systems
20(10)
2.2.1 Attenuation
21(1)
2.2.2 Noise and Interference
22(1)
2.2.2.1 Sources of Noise
23(1)
2.2.2.2 Relevance of Type of Noise
24(1)
2.2.3 Distortion
24(1)
2.2.3.1 Amplitude Distortion
25(1)
2.2.3.2 Phase Distortion or Delay Distortion
26(2)
2.2.3.3 Harmonic Distortion
28(1)
2.2.4 Cross-Talk, Echoes, and Singing
29(1)
2.3 What Is Done about These Problems
30(1)
2.4 Digital Advantage
31(1)
2.5 Digital Signal
31(1)
2.6 Processing of Digital Signal
32(2)
2.7 Channel Capacity in Digital Technology
34(1)
2.8 Advantages of Digital Technology
35(2)
2.8.1 Universality of Components and Media
35(1)
2.8.2 Cheap and Reliable Storage
36(1)
2.8.3 Low Cost of the Equipment
36(1)
2.8.4 Ease of Signaling
36(1)
2.8.5 Use of Microprocessor
36(1)
2.8.6 Less Precision Required
37(1)
2.9 Disadvantages of Digital Technology
37(4)
Review Questions
38(1)
Critical Thinking Questions
39(1)
Bibliography
39(2)
3 Analog-to-Digital Conversion and TDM Principles
41(28)
3.1 Analog and Digital Signals
41(4)
3.1.1 Continuous Time Analog Signal
41(1)
3.1.2 Discrete Time Analog Signal
42(1)
3.1.3 Digital Signal
42(2)
3.1.4 Digital Signal Processing
44(1)
3.2 Sampling Theorem
45(1)
3.3 (Analog) Pulse Modulation
46(3)
3.3.1 Pulse Amplitude Modulation
47(1)
3.3.2 Pulse Width Modulation
47(1)
3.3.3 Pulse Position Modulation
48(1)
3.4 Digital Pulse Code Modulation
49(7)
3.4.1 Sampling
49(1)
3.4.2 Quantization
50(3)
3.4.3 Quantization Noise
53(1)
3.4.4 Companding
54(2)
3.5 Other Digital Modulations
56(2)
3.5.1 Differential PCM
56(1)
3.5.2 Delta Modulation
57(1)
3.5.3 Adaptive Differential PCM
57(1)
3.5.4 Adaptive Delta Modulation
57(1)
3.6 A/D and D/A Converters
58(3)
3.6.1 A/D Converter
58(1)
3.6.2 D/A Converter
58(2)
3.6.3 Accuracy of A/D and D/A Conversion
60(1)
3.7 Time Division Multiplexing
61(8)
3.7.1 TDM/PCM
63(2)
Review Questions
65(2)
Critical Thinking Questions
67(1)
Bibliography
67(2)
4 Line Coding and Digital Modulation
69(32)
4.1 Factors Affecting the Choice of Line Code
70(9)
4.1.1 Timing Content
70(3)
4.1.2 DC Wander
73(1)
4.1.3 Bandwidth Requirement
73(2)
4.1.4 Power Consumption
75(1)
4.1.5 Performance Monitoring Features
76(1)
4.1.6 Error Probability
77(2)
4.1.7 Cost
79(1)
4.2 Types of Line Codes
79(5)
4.2.1 Unipolar (RZ) Code (On-Off)
79(1)
4.2.2 Polar (NRZ) Code
79(1)
4.2.3 Alternate Mark Inversion Code (Bipolar Code)
80(1)
4.2.4 High Density Bipolar-3 Code
81(1)
4.2.5 Coded Mark Inversion Code
82(1)
4.2.6 Manchester Code
83(1)
4.2.7 Multilevel Line Codes
84(1)
4.3 Digital Modulation Techniques
84(8)
4.3.1 Amplitude Modulation (ASK)
85(1)
4.3.1.1 Demodulation of Amplitude-Modulated Carrier
85(1)
4.3.2 Frequency Shift Keying
86(1)
4.3.2.1 Demodulation of FSK Signals
87(1)
4.3.3 Phase Shift Keying
87(1)
4.3.3.1 Demodulation of PSK
88(1)
4.3.4 Multiple Phase Shift Keying
89(1)
4.3.5 Quadrature Amplitude Modulation
90(1)
4.3.6 Digital Modulations for Optical Fiber Transmission
91(1)
4.4 Other Means of Improving the Timing Content
92(9)
4.4.1 Using Block Coding
92(1)
4.4.2 Using Scrambler
93(5)
4.4.3 Adding Redundant Bits
98(1)
Review Questions
98(2)
Critical Thinking Questions
100(1)
Bibliography
100(1)
5 Clock
101(12)
5.1 What Is a Clock?
101(1)
5.2 Significance of the Clock
102(2)
5.2.1 Triggering the Events
102(1)
5.2.2 Reception of Digital Bit Stream
103(1)
5.3 Clock Waveform
104(1)
5.4 Types of Clocks
105(3)
5.4.1 Multivibrator Clock
105(1)
5.4.2 Crystal Oscillator Clock
106(1)
5.4.3 Atomic Clocks
107(1)
5.5 Clock Accuracy Required in Communication Systems
108(5)
Review Questions
110(1)
Critical Thinking Questions
111(1)
Bibliography
111(2)
6 Signal Impairments, Error Detection, and Correction
113(32)
6.1 Types of Signal Impairments
114(1)
6.2 Attenuation
114(1)
6.3 Distortion
115(1)
6.4 Intersymbol Interference
116(4)
6.4.1 Effect of Pulse Shape on ISI
117(3)
6.5 Jitter and Wander
120(9)
6.5.1 Control of Jitter and Wander
123(2)
6.5.1.1 Phase-Locked Loop
125(2)
6.5.1.2 Elastic Store
127(2)
6.6 Eye Diagram
129(1)
6.7 Error Detection
130(4)
6.7.1 Use of Error Detecting Line Codes
131(1)
6.7.2 Inserting Parity Bits
131(2)
6.7.3 Through CRC
133(1)
6.8 Error Correction
134(3)
6.8.1 Repetition of Packets Containing Errored Bits (Automatic Repeat Request)
134(1)
6.8.2 Forward Error Correction
135(2)
6.9 Link Performance
137(4)
6.10 Required Link Performance
141(4)
Review Questions
142(1)
Critical Thinking Questions
143(1)
Bibliography
144(1)
7 Synchronization
145(40)
7.1 Synchronization Process
146(9)
7.1.1 Correct Detection of Symbols
147(1)
7.1.1.1 Demodulation
147(2)
7.1.1.2 Filtering
149(1)
7.1.1.3 Amplification
149(1)
7.1.1.4 Equalization and Pulse Shaping
149(1)
7.1.1.5 Decision Making
150(1)
7.1.2 Timing Recovery and Clock Synchronization
150(2)
7.1.3 Framing
152(2)
7.1.4 Use of Multiframes
154(1)
7.2 Synchronous vs. Asynchronous Systems
155(3)
7.2.1 Asynchronous Systems
155(2)
7.2.2 Synchronous Systems
157(1)
7.3 Synchronous Networks
158(1)
7.4 Plesiochronous Networks
159(2)
7.5 Slips
161(1)
7.6 Elastic Store and Controlled Slips
162(2)
7.7 Line Synchronization vs. Networks Synchronization
164(1)
7.8 Types of Network Synchronization
165(2)
7.8.1 Master-Slave Synchronization
166(1)
7.8.1.1 Using Primary and Secondary Reference Clocks
166(1)
7.8.1.2 By Timing Distribution through GPS
166(1)
7.8.2 Mutual Synchronization
166(1)
7.9 Pseudosynchronization
167(3)
7.9.1 Permitted Number of Slips in Pseudosynchronization Network
168(1)
7.9.2 Slip Rate Calculations
169(1)
7.10 Synchronization Network Engineering (Planning a Synchronous Network)
170(15)
7.10.1 Network Synchronization Areas
171(1)
7.10.2 Synchronization Chain
171(1)
7.10.3 Master Clock SSUs and SECs
171(1)
7.10.3.1 Master Clock (PRC)
171(2)
7.10.3.2 Synchronization Supply Unit
173(2)
7.10.3.3 SDH Equipment Slave Clocks
175(1)
7.10.4 Typical Synchronous Network
175(2)
7.10.5 Synchronization Principles and Timing Loops
177(1)
7.10.5.1 Timing Loops
178(1)
7.10.6 Synchronization Status Message
179(1)
Review Questions
180(3)
Critical Thinking Questions
183(1)
Bibliography
183(2)
8 Plesiochronous Digital Hierarchy
185(48)
8.1 Pulse Code Modulation
186(7)
8.1.1 Multiplexer
187(1)
8.1.2 PCM/E1/2MB Multiplexing Structure
188(1)
8.1.3 Time Slot 0
189(1)
8.1.4 Multiframe
190(1)
8.1.4.1 Time Slot 0 Details
190(1)
8.1.5 Time Slot 16
191(2)
8.2 Higher-Order Multiplexing/Hierarchical Multiplexing
193(15)
8.2.1 E2 Multiplexing
194(2)
8.2.2 E1 Bit Rate Variation
196(1)
8.2.3 Justification or Bit Stuffing
196(2)
8.2.4 Number of Justification Bits
198(1)
8.2.5 Justification Control
199(2)
8.2.6 E2 Frame Structure
201(1)
8.2.6.1 Set I
202(1)
8.2.6.2 Sets II and III
203(1)
8.2.6.3 Set IV
204(1)
8.2.7 E2 Bit Rate and Bit Rate Adaptation of E1s
205(2)
8.2.8 Bit Rate Adaptation
207(1)
8.2.9 Positive/Negative Justification
207(1)
8.2.10 Variable Bit Rates of E2
207(1)
8.3 E3 Multiplexing
208(3)
8.3.1 E3 Frame Structure
209(1)
8.3.1.1 Set I
209(1)
8.3.1.2 Sets II and III
209(1)
8.3.1.3 Set IV
209(2)
8.3.2 Bit Rate Adaptation in E3
211(1)
8.4 E4 Multiplexing
211(6)
8.4.1 E4 Frame Structure
212(1)
8.4.1.1 Set I
212(1)
8.4.1.2 Bit 13
213(1)
8.4.1.3 Bits 14 to 16
213(1)
8.4.1.4 Bits 17 to 488
213(1)
8.4.1.5 Set II to Set V
213(1)
8.4.1.6 Set VI
214(1)
8.4.2 Bit Rate Adaptation in E4
215(2)
8.5 Higher Bit Rates
217(1)
8.6 Framing Stages, Tributary Data, Overhead, and Payload Bits
217(1)
8.7 North American PDH Hierarchy
218(1)
8.8 Types of Line Codes used in PDH
219(1)
8.9 Synchronization in PDH
219(7)
8.9.1 Using Master-Slave Synchronization
221(1)
8.9.2 Using High-Accuracy Clocks
222(1)
8.9.3 Clock Accuracy and Number of Slips in PDH Systems
223(1)
8.9.4 Current Trends
224(1)
8.9.5 E1 Synchronization through Plesiochronous Network
225(1)
8.10 Asynchronous vs. Synchronous Multiplexing
226(1)
8.11 Skip Multiplexers
227(6)
Review Questions
228(3)
Critical Thinking Questions
231(1)
Bibliography
231(2)
9 Plesiochronous Digital Hierarchy Maintenance Alarms
233(16)
9.1 Types of Alarms
234(1)
9.2 Loss of Signal
234(1)
9.3 Loss of Framing
235(2)
9.4 Alarm Indication Signal
237(1)
9.5 Remote Defect Indication
238(1)
9.6 Determination of Fault Location
239(1)
9.7 Loss of Multiframe Alignment
240(1)
9.8 Multiframe Alignment AIS
241(1)
9.9 Multiframe Alignment
241(8)
Review Questions
247(1)
Critical Thinking Questions
248(1)
Bibliography
248(1)
10 Synchronous Digital Hierarchy
249(68)
10.1 Evolution of Synchronous Digital Hierarchy
249(3)
10.2 Advantages of SDH
252(3)
10.2.1 Data Rates
252(1)
10.2.2 Direct Drop/Insert of Tributaries
253(1)
10.2.3 Automatic Protection Switching/Self-Healing
253(1)
10.2.4 Compatibility with the Prevailing Standards
253(1)
10.2.5 Vendor Compatibility
254(1)
10.2.6 Compatibility with Data Communication Protocols
254(1)
10.2.7 Excellent Operations, Administration, and Management
255(1)
10.3 Price to Be Paid for the Advantages
255(1)
10.3.1 Establishing Timing Distribution throughout the Network
255(1)
10.3.2 Added Jitter Due to Pointer Adjustment
255(1)
10.3.3 Poorer Framing Efficiency
256(1)
10.3.4 Virus Threat
256(1)
10.4 Synchronous Transport Module
256(2)
10.5 Formation of STM-1
258(4)
10.5.1 Justification of E1 Tributaries
259(1)
10.5.2 Frame Rate of STM-1
259(3)
10.6 Container
262(2)
10.7 Mapping
264(2)
10.8 Virtual Containers
266(2)
10.8.1 Data Rates
266(2)
10.9 Path and Section
268(3)
10.9.1 Regenerator Section Overhead
270(1)
10.9.2 Multiplex Section Overhead
270(1)
10.9.3 Section Overhead
270(1)
10.9.4 Path Overhead
270(1)
10.10 SDH Layers
271(1)
10.11 Tributary Unit
272(2)
10.12 Further Multiplexing
274(6)
10.12.1 Bit Rates
274(1)
10.12.2 Tributary Unit Groups
275(1)
10.12.3 KLM Numbering
276(1)
10.12.4 Administrative Unit
277(3)
10.13 Multiplexing of Higher-Order PDH Tributaries
280(3)
10.13.1 Multiplexing Structure of E4
280(2)
10.13.2 Multiplexing of E2 Rate (8.448 Mbps)
282(1)
10.13.3 Multiplexing Routes
282(1)
10.13.4 Significance of AUG
283(1)
10.14 Complete SDH Multiplexing Structure
283(3)
10.14.1 STM-O
284(2)
10.15 Frame Structure of STM-1
286(2)
10.16 Pointer
288(20)
10.16.1 AU Pointer
288(4)
10.16.1.1 Floating Frames
292(3)
10.16.2 TU Pointer
295(1)
10.16.2.1 Functioning and Purpose
296(1)
10.16.3 Summary of Pointer Advantages
297(1)
10.16.4 Disadvantages of Pointer
298(1)
10.16.5 AU-4 Pointer Details
299(2)
10.16.5.1 Justifications and Pointer Adjustment
301(2)
10.16.5.2 New Data Flag
303(1)
10.16.6 Bit Rate Adjustment Range of Pointer
304(1)
10.16.7 AU-3 Pointer
305(1)
10.16.8 Details of TU Pointer
306(2)
10.17 Formation of Higher-Order STMs
308(2)
10.17.1 AUG Level Multiplexing
308(1)
10.17.2 STM-1 Level Multiplexing
309(1)
10.18 Frame Structure of Higher-Order STMs
310(7)
Review Questions
311(3)
Critical Thinking Questions
314(1)
Bibliography
315(2)
11 Operations and Maintenance in SDH
317(42)
11.1 Performance Monitoring
318(9)
11.1.1 Systems Out-of-Service Performance Monitoring
318(1)
11.1.2 In-Circuit Performance Monitoring
319(2)
11.1.2.1 Parity Check
321(3)
11.1.2.2 Indications Generated by Parity Bytes
324(3)
11.2 Fault Diagnostics and Restoration
327(7)
11.2.1 Loss of Signal
327(1)
11.2.2 Loss of Framing
327(1)
11.2.3 Alarm Indication Signal
328(1)
11.2.4 Remote Defect Indication
329(1)
11.2.4.1 Higher-Order Path Remote Defect Indication
329(1)
11.2.5 Further Transmission of AIS to AU + TU Levels
330(1)
11.2.6 Multiplex Section Excessive Errors
331(1)
11.2.7 Loss of Pointer (AU-LOP and TU-LOP)
332(1)
11.2.8 Higher-Order Path Unequipped and Lower-Order Path Unequipped
333(1)
11.2.9 Trace Identifier Mismatch
333(1)
11.2.10 Signal Label Mismatch
334(1)
11.2.11 Tributary Unit Loss of Multiframe
334(1)
11.3 Summary of SDH Alarms and Indication
334(3)
11.3.1 SDH Performance Indicators
334(3)
11.3.1.1 Anomaly
337(1)
11.3.1.2 Defect
337(1)
11.3.1.3 Failure
337(1)
11.4 Performance Monitoring Parameters
337(3)
11.4.1 Error Performance Objectives
339(1)
11.5 Roles of Other Overhead Bytes
340(2)
11.5.1 SOH Bytes
340(1)
11.5.1.1 Bytes E1 (RSOH) and E2 (MSOH)
340(1)
11.5.1.2 Byte F1 (User Channel) (RSOH)
341(1)
11.5.1.3 Bytes K1 and K2 (MSOH)
341(1)
11.5.1.4 Byte S1 (Synchronization Status Message Byte)
341(1)
11.5.1.5 Δ Bytes (RSOH): Media-Dependent Byte
342(1)
11.5.1.6 Bytes X (Reserved for National Use)
342(1)
11.5.1.7 Bytes D1 to D12: Data Communication (DCC) Bytes
342(1)
11.5.1.8 Unmarked Bytes
342(1)
11.6 Overhead Bytes Summary
342(4)
11.6.1 Regenerator Section Overhead
343(1)
11.6.2 Multiplex Section Overhead
344(1)
11.6.3 Higher-Order Path Overhead
344(2)
11.6.4 Lower-Order Path Overhead
346(1)
11.7 Network Management in SDH
346(13)
11.7.1 Network Management System
347(1)
11.7.1.1 Distributed Control
347(1)
11.7.1.2 Distributed Authorization
348(1)
11.7.1.3 Customer-Managed Links
349(1)
11.7.2 Complete Telecommunications Network Management
349(1)
11.7.3 NMS Activities
349(1)
11.7.3.1 Configuration
350(1)
11.7.3.2 Provisioning
351(1)
11.7.3.3 Performance Monitoring
352(1)
11.7.3.4 Fault Diagnostics and Management Alarms
353(1)
11.7.3.5 Security
353(1)
11.7.3.6 Timing Management
354(1)
11.7.3.7 Maintenance Operations
354(1)
Review Questions
355(2)
Critical Thinking Questions
357(1)
Bibliography
358(1)
12 SDH Architecture and Protection Mechanism
359(40)
12.1 SDH Network Elements
360(3)
12.1.1 Terminal Multiplexer
360(1)
12.1.2 Regenerator
361(1)
12.1.3 Add/Drop Multiplexer
361(1)
12.1.4 Digital Cross Connect
362(1)
12.1.4.1 Higher-Order Cross Connect
362(1)
12.1.4.2 Lower-Order Cross Connect
362(1)
12.2 SDH Network Topologies
363(2)
12.3 Work and Protect Paths
365(1)
12.4 Advantage of a Ring
366(1)
12.5 Protection Switching Schemes
367(4)
12.5.1 1 + 1 Protection Scheme
367(2)
12.5.2 1:1 Protection Scheme
369(1)
12.5.3 1:N Protection Scheme
369(2)
12.6 Self-Healing Rings
371(1)
12.7 Types of Automatic Protection Switching
371(1)
12.8 MS Dedicated Ring Protection
372(1)
12.9 MS Shared Ring Protection
373(13)
12.9.1.1 Principles of Working
374(3)
12.9.1.2 Switching Mechanism
377(5)
12.9.2 Commands for Protection Switching
382(1)
12.9.2.1 Commands Activated through K1 Byte
382(3)
12.9.2.2 Commands Activated through K2 Byte
385(1)
12.10 Other Important Features of Protection Switching
386(3)
12.10.1 Switching Time
386(1)
12.10.2 Switching Initiation Time
387(1)
12.10.3 Operation Mode
387(1)
12.10.4 Switching Protocol
387(1)
12.10.5 Manual Controls
387(1)
12.10.6 Misconnection
388(1)
12.10.7 Squelching
388(1)
12.10.8 Nonpreemptible Unprotected Traffic (NUT)
388(1)
12.10.9 DXC Byte Commands
389(1)
12.11 Subnetwork Connection Protection
389(3)
12.11.1 Principles of Working
390(1)
12.11.2 Switching Mechanism
390(2)
12.11.3 Other Important Features
392(1)
12.12 Comparison of Various Protection Schemes
392(1)
12.13 Deployment of Protection in a Network
393(6)
Review Questions
395(2)
Critical Thinking Questions
397(1)
Bibliography
397(2)
13 Data Over SDH
399(16)
13.1 Problems in Interfacing Data and SDH
401(1)
13.1.1 Difference in the Bit-Stream Structure
401(1)
13.1.2 Difference in Signaling (Protocol)
401(1)
13.1.3 Difference in Throughput Rate
402(1)
13.2 Data as Payload
402(1)
13.3 Concatenation
403(2)
13.4 Contiguous Concatenation
405(2)
13.5 Mapping of ATM Frames
407(3)
13.5.1 ATM Mapping in VC-4
408(1)
13.5.2 ATM Mapping in VC-2
409(1)
13.6 Mapping of HDLC, PPP, Ethernet, IP, and LAPS
410(1)
13.7 Shortcomings of Data over SDH
411(4)
13.7.1 Requirement of Concatenation Feature
411(1)
13.7.2 Inefficient Capacity Utilization
412(1)
13.7.3 Stuffing Bytes Requirement
412(1)
13.7.4 Handling of Multiple Protocols
412(1)
Review Questions
412(1)
Critical Thinking Questions
413(1)
Bibliography
414(1)
14 Emerging Systems and the Future of SDH
415(38)
14.1 Case for Ethernet Backbone
416(2)
14.2 SDH's Fight
418(1)
14.3 Next-Generation SDH
418(24)
14.3.1 Virtual Concatenation
419(1)
14.3.1.1 V-CAT Procedure
419(1)
14.3.1.2 Mapping of 10-Mbps Ethernet
420(1)
14.3.1.3 Efficiencies of Other Services
421(2)
14.3.1.4 Resilience through V-CAT
423(1)
14.3.1.5 Payload Identification and Realignment
423(4)
14.3.1.6 Payload Identification and Realignment in LO-V-CAT
427(1)
14.3.2 Link Capacity Adjustment Scheme
428(1)
14.3.2.1 Improving the Link Reliability (Resilience)
429(1)
14.3.2.2 Automatic Removal of Failed Members
429(1)
14.3.2.3 In-Service Resizing of Bandwidth
430(1)
14.3.2.4 Provisioning of Asymmetric Bandwidth
431(1)
14.3.2.5 Working with Non-LCAS Nodes
431(1)
14.3.2.6 LCAS Operation (Higher Order)
431(2)
14.3.2.7 Lower-Order LCAS
433(1)
14.3.3 Generic Framing Procedure
434(1)
14.3.3.1 What Is GFP?
435(1)
14.3.3.2 Advantages of GFP
436(2)
14.3.3.3 GFP Frame Structure
438(1)
14.3.3.4 GFP Mapping
439(1)
14.3.3.5 Frame-Mapped GFP
439(1)
14.3.3.6 Transparent Mapped GFP
440(1)
14.3.3.7 Comparison of GFP(F) and GFP(T)
441(1)
14.4 Resilient Packet Ring
442(3)
14.4.1 Classes of Service in RPR
443(1)
14.4.2 Fairness Control
444(1)
14.4.3 Protection in RPR
444(1)
14.4.4 RPR Management
444(1)
14.5 New-Generation Network Elements
445(1)
14.5.1 Multiservice Provisioning Platform
445(1)
14.5.2 Multiservice Switching Platform
445(1)
14.5.3 Multiservice Transport Node
445(1)
14.5.4 Wave Length Division Multiplexing
445(1)
14.5.5 Optical Transport Network
445(1)
14.5.6 Carrier Ethernet
445(1)
14.6 What Is the Future, SDH or Packet Networks?
446(7)
Review Questions
448(2)
Critical Thinking Questions
450(1)
Bibliography
450(3)
15 Transmission Media for PDH/SDH and OFC Technology
453(30)
15.1 Types of Media for PDH/SDH Transmission
453(6)
15.1.1 Copper Wire Pair
453(2)
15.1.2 Coaxial Cables
455(1)
15.1.3 Microwave Radios
456(1)
15.1.4 Free Space Optics (Air Fiber)
457(1)
15.1.5 Optical Fiber Cable
458(1)
15.2 Optical Fiber Communication Technology
459(12)
15.2.1 Principles of OFC
459(2)
15.2.2 Optical Frequency/Wavelength Used
461(2)
15.2.3 Types of Optical Fibers
463(1)
15.2.3.1 Plastic Fiber
463(1)
15.2.3.2 Glass Fibers
464(1)
15.2.3.3 Multimode Fiber
464(1)
15.2.3.4 Single Mode Fiber
465(1)
15.2.3.5 Dispersion-Shifted Fibers
465(1)
15.2.3.6 Step Index Fiber
466(1)
15.2.3.7 Graded Index Fibers
466(1)
15.2.4 OFC System Components
467(1)
15.2.4.1 Optical Source
467(2)
15.2.4.2 Photo Detector
469(2)
15.3 All Optical Networks
471(4)
15.3.1 Optical Amplifiers
471(1)
15.3.2 Wavelength Division Multiplexing
472(2)
15.3.3 Optical Cross Connect
474(1)
15.3.4 Optical Add-Drop Multiplexer
474(1)
15.4 OFC Link Budget
475(8)
15.4.1 Loss Margin
477(1)
15.4.2 Dispersion Limit
477(1)
Review Questions
478(2)
Critical Thinking Questions
480(1)
Bibliography
481(2)
16 Introduction to Optical Transport Networks
483(28)
16.1 OTH Principles
485(1)
16.2 Multiplexing Structure of OTN
485(3)
16.2.1 Optical Payload Unit
487(1)
16.2.2 Optical Data Unit
487(1)
16.2.3 Optical Transport Unit
487(1)
16.2.4 Optical Channel
487(1)
16.2.5 Optical Channel Carrier
487(1)
16.2.6 Optical Channel Group
487(1)
16.2.7 Optical Transport Module
488(1)
16.2.8 Optical Multiplex Section
488(1)
16.2.9 Optical Transmission Section
488(1)
16.3 Multiplexing Hierarchy of OTN
488(4)
16.4 OTN Layers
492(1)
16.5 OTN Domain Interfaces
493(1)
16.5.1 Intradomain Interface
493(1)
16.5.2 Interdomain Interface
493(1)
16.6 Advantages of OTN
494(2)
16.6.1 Very High Link Capacity
494(1)
16.6.2 Forward Error Corrections
494(1)
16.6.3 Backward Compatibility with Existing Protocols
494(1)
16.6.4 Improved Efficiency for Data Traffic
494(1)
16.6.5 Reduced Number of Regenerators
495(1)
16.6.6 Strong Management and Protection
495(1)
16.6.7 Quick Localization of Faults
495(1)
16.7 Frame Structure of OTN
496(7)
16.7.1 Framing Bytes
497(1)
16.7.2 OTU Overhead
497(2)
16.7.3 ODU Overhead
499(3)
16.7.4 OPU Overhead
502(1)
16.8 Forward Error Correction
503(3)
16.9 Operations and Maintenance in OTN
506(1)
16.9.1 Forward Defect Indication
506(1)
16.9.2 Open Connections Indication
506(1)
16.9.3 Locked
506(1)
16.9.4 Payload Missing Indications
506(1)
16.10 Future of OTN
507(4)
Review Questions
508(2)
Critical Thinking Questions
510(1)
Bibliography
510(1)
Index 511
Rajesh Kumar Jain
Biežāk uzdotie jautājumi par e-grāmatām Biežāk uzdotie jautājumi par e-grāmatām
Permanent link: https://www.kriso.lv/db/97813518322436e.html
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