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E-grāmata: Principles of Verilog Digital Design

  • Formāts: 606 pages
  • Izdošanas datums: 27-Feb-2022
  • Izdevniecība: CRC Press
  • Valoda: eng
  • ISBN-13: 9781000519204
  • Formāts - PDF+DRM
  • Cena: 75,13 €*
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  • Formāts: 606 pages
  • Izdošanas datums: 27-Feb-2022
  • Izdevniecība: CRC Press
  • Valoda: eng
  • ISBN-13: 9781000519204

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Covering both the fundamentals and the in-depth topics related to Verilog digital design, both students and experts can benefit from reading this book by gaining a comprehensive understanding of how modern electronic products are designed and implemented. Principles of Verilog Digital Design contains many hands-on examples accompanied by RTL codes that together can bring a beginner into the digital design realm without needing too much background in the subject area.

This book has a particular focus on how to transform design concepts into physical implementations using architecture and timing diagrams. Common mistakes a beginner or even an experienced engineer can make are summarized and addressed as well. Beyond the legal details of Verilog codes, the book additionally presents what uses Verilog codes have through some pertinent design principles.

Moreover, students reading this book will gain knowledge about system-level design concepts. Several ASIC designs are illustrated in detail as well. In addition to design principles and skills, modern design methodology and how it is carried out in practice today are explored in depth as well.



Covering both the fundamentals and the in-depth topics related to Verilog Digital Design, both students and experts can benefit from reading this book by gaining a comprehensive understanding of how modern electronic products are designed and implemented.

Chapter 1 Introduction

Chapter 2 Fundamentals of Verilog

Chapter 3 Advanced Verilog Topics

Chapter 4 Number Representation

Chapter 5 Combinational Circuits

Chapter 6 Sequential Circuits

Chapter 7 Digital System Designs

Chapter 8 Advanced System Designs

Chapter 9 I/O Interface
Chapter

10 Logic Synthesis with Design Compiler

Appendix A Basic Logic Gates and User Defined Primitives

Appendix B Non-Synthesizable Constructs

Appendix C Advanced Net Data Types

Appendix D Signed Multipliers

Appendix E Good Coding and Naming Styles

Wen-Long Chin is a professor of Engineering Science, at the National Cheng Kung University (NCKU), Taiwan. Before holding the faculty position, he worked in the Hsinchu Science Park, Taiwan, for over 11 years, in charge of communication and network IC designs. He is a senior member of IEEE and serves as Technical Editor of IEEE Wireless Communications, and Associate Editors of IEEE Access and EURASIP Journal on Wireless Communications and Networking. He has published approximately 60 Journal and conference papers, 1 book chapter, and 14 patents.