The International conference on Semiconductor Materials packaging, AI&ML, Reconfigurable VLSI architectures for IoT, future Communication Technologies (SMART-2024) aimed to provide a platform for researchers, academicians, industry experts, and practitioners to exchange ideas, present research findings, and discuss emerging trends and challenges in the specified fields. SMART-2024 seeked to foster collaboration, innovation, and knowledge dissemination by bringing together experts and stakeholders from diverse backgrounds to address key issues and explore new research directions. The conference targeted a diverse audience including researchers, academicians, scientists, engineers, technologists, industry professionals, students, policymakers, and other stakeholders interested in VLSI, IoT, AI-ML, communication systems, semiconductor packaging, hetero architecture devices, and Nano materials.
The Conference aimed to provide a platform for researchers, academicians, industry experts, and practitioners to exchange ideas, present research findings, and discuss emerging trends and challenges in the specified fields.
1. Tumor extraction system using U-Net and Adamax optimizer
2. Future facts of Amazon deforestation based on static data over 20152023
3. Neura flow: cardiac output monitoring via deep learning from arterial
pressure
4. A comparative performance analysis of support vector machine and custom
spectral CNN for hyperspectral image classification
5. IoT based energy efficient air conditioning system using machine
learning
6. A study on audio steganographic healthcare transmission in 5G
7. Design and verification of 16 & 32-Bit CPUS using ARM architecture
8. IoT-driven solar-powered robotic lawn mower and water sprinkler
9. Neuro-enhanced copilot wheelchair: a comprehensive study
10. Analysis of chronic kidney disease using machine learning techniques
11. Internet of things (IoT) and solar based sowing seed agriculture robot
using Arduino mega
12. Efficient fall detection for elderly with integrated machine learning and
sensor networks
13. Compact high isolation 4 × 4 MIMO antenna
14. ST-QCA based error free and area efficient 4:2 compressor design
15. Precision enhancement through truncated multiplier design in filter
structure
applications
16. Design and numerical investigations of ITO/SnO2/CdS/CH3NH3SnI3/CuSCN/Au
perovskite solar cell
17. Deep enhance: Convolutional neural network-based enhancement of
underwater
images
18. Arduino controlled radar guided defence system for detecting and
tracking threats
19. Implementing question answering models with BERT (bidirectional encoder
representations from transformers)
20. Enhancing video summarization with natural language processing
21. Automated hydroponic plant growth system using IoT
22. Broadband light communication link: performance assessment of series
parallel EDFA families and RAMAN amplifier structures
23. Design and implementation of 4-2 approximate compressor for FPGA
24. MRFIR: Area and power efficient modified reconfigurable FIR filter
25. Implementation of AI-powered adaptive communication for differently
abled people using LSTM
26. Real-time implementation of DCT-based image compression for robotics
applications
27. Predicting bitcoin value fluctuations using machine learning
28. A case study focusing on partial reconfiguration using FPGA
29. Smart tag EMS: utilizing intelligent navigation and communication to
transform ambulance response
30. Sentiment analysis and visualization of real and fake reviews
31. Implementation of different approximate sum-of-products models for the
gaussian filter
32. Leveraging Apriori and Bi-LSTM networks to uncover complex purchase
patterns in market basket analysis
33. Improving brain tumor detection and classification through skull
stripping and multi-scale convolutional neural network
34. Tourism recommendation system based on sentiment analysis and machine
learning
35. Multi mode force based interactive device for patients with neurological
disorders
36. Design and implementation of Binary-Ring-LWE
37. RNS integer arithmetic design for elliptic curve cryptography
38. Efficient design of a 16-Bit multiplier with low power and high-speed
capabilities
39. Hardware-based design to estimate the movement of elderly in indoor
environments
40. A study on DDD mode delay optimization in dual chamber pacemaker
41. Automatic live location sharing for real-time vehicle tracking
42. IOT based robotic solutions for hospital security using ESP32
microcontroller
43. Offset binary coding-based symmetrical 2D FIR FBs using FPGA and ASIC
designs
44. A broadband, circularly polarized UHF RFID reader antenna for traffic
vehicles detection
45. Design of sample-hold circuit for optimal operating conditions
46. A study of low power high-speed sense amplifier for memory applications
47. Development of smart and secure home automation prototype with IoT
48. Enhanced web application for food ordering with machine leaning based
predictive analytics
49. Enhancing campus mobility: locating optimal docking stations and
design an authorized accessibility system for public bicycle sharing system
50. Smart hearing wheelchair for disable people
51. Design and performance analysis of 880-960 MHz power amplifier for 5G
new radio n8 frequency band applications
52. YOLOv8 based segmentation and ResNet-50 classifier for medical image
retrieval and classification
53. A novel ensemble approach for enhanced heart disease prediction
54. Enhancing thyroid cancer diagnosis with ensemble machine learning
techniques
55. Water filter replacement alarm
56. Near-infrared based glucose monitoring system
57. Real-time guidance for smooth Indoor navigation environments
58. Utilizing an IORT-based remote access vehicle for monitoring
59. Design and analysis of a quantum FinFET-based memristor with gate
diffusion input for neuromorphic computing applications using 16 nm
technology
60. Enhancing security by monitoring the behavior of different
classification algorithms
61. Convolutional neural network architecture for tumor segmentation
identification leveraging the VGG-16 model
62. Efficient power optimization strategies in 5G communication networks: a
comprehensive review
63. Addressing special skew and minimum pulse width checks in static timing
analysis
64. A Comparative analysis of denoising PCG signals using adaptive
Wiener-Kalman filtering
65. Circuit analysis realization for a three dimensional coexisting chaotic
attractor system utilizing a single multiplier and its use in secure
communication
66. Optimizing fault coverage in VLSI circuits via balanced scan chain
analysis
67. Robust test pattern generators for secure built-in self-test
implementation
68. Design and performance analysis of automated floor cleaning robot
69. Designing and simulations of PCF-SPR based biosensor
70. Predicting energy consumption for smart buildings in a smart grid
scenario using machine learning models
71. A novel machine learning and deep learning feature for identification of
cardiac arrhythmia from ECG images
72. Low power single phase clock flip-flop design with redundancy
elimination and power gating technique
73. Variations in total electron content (TEC) and earths magnetic field at
some stage in quiet and disturbed days
74. Embedded AI for agriculture: the Agro onion bo Agro Onion Bot for
efficient onion cultivation
75. Design and development of egg incubator to reduce pre-mature hatching
76. Lung sounds classification using parallel pooling structure with CNN
model
77. Design of peripheral component interconnect express physical layer
78. Design and development of multilevel security system in automated teller
machine
79. Full-custom design-based efficient 2D-FIR filter architecture using
approximate multipliers and high speed adders
T. Vasudeva Reddy is an Associate Professor in Electronics and Communication Engineering (ECE), B V RAJU Institute of Technology, Narsapur. His expertise lies in enhancing electronic system efficiency, focusing on power consumption, area utilization, and signal delay optimization. His research encompasses Low Power SRAM Architectures, Sub-threshold SRAM Designs, and MEMS Devices for Coagulation Effect, supported by a rich publication record and a commitment to innovative research.
K. Madhava Rao, Assistant Professor at B V RAJU Institute of Technology, Narsapur since 2016, boasts a comprehensive exploration and contribution to electronics and communication engineering. His research covers hardware implementation, low-power techniques, FPGA-based systems, and advanced memory designs, presented at international conferences and esteemed journals.
