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E-grāmata: RF Microelectronics

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  • Formāts: 960 pages
  • Izdošanas datums: 22-Sep-2011
  • Izdevniecība: Pearson
  • Valoda: eng
  • ISBN-13: 9780132901055
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  • Formāts: 960 pages
  • Izdošanas datums: 22-Sep-2011
  • Izdevniecība: Pearson
  • Valoda: eng
  • ISBN-13: 9780132901055

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The Acclaimed RF Microelectronics Best-Seller, Expanded and Updated for the Newest Architectures, Circuits, and DevicesWireless communication has become almost as ubiquitous as electricity, but RF design continues to challenge engineers and researchers. In the 15 years since the first edition of this classic text, the demand for higher performance has led to an explosive growth of RF design techniques. In RF Microelectronics, Second Edition,Behzad Razavi systematically teaches the fundamentals as well as the state-of-the-art developments in the analysis and design of RF circuits and transceivers.Razavi has written the second edition to reflect today’s RF microelectronics, covering key topics in far greater detail. At nearly three times the length of the first edition, the second edition is an indispensable tome for both students and practicing engineers. With his lucid prose, Razavi nowOffers a stronger tutorial focus along with hundreds of examples and problemsTeaches design as well as analysis with the aid of step-by-step design procedures and a chapter dedicated to the design of a dual-band WiFi transceiverDescribes new design paradigms and analysis techniques for circuits such as low-noise amplifiers, mixers, oscillators, and frequency dividersThis edition’s extensive coverage includes brand new chapters on mixers, passive devices, integer-N synthesizers, and fractional-N synthesizers. Razavi’s teachings culminate in a new chapter that begins with WiFi’s radio specifications and, step by step, designs the transceiver at the transistor level.Coverage includesCore RF principles, including noise and nonlinearity, with ties to analog design, microwave theory, and communication systemsAn intuitive treatment of modulation theory and wireless standards from the standpoint of the RF IC designerTransceiver architectures such as heterodyne, sliding-IF, directconversion, image-reject, and low-IF topologies.Low-noise amplifiers, including cascode common-gate and commonsource topologies, noise-cancelling schemes, and reactance-cancelling configurationsPassive and active mixers, including their gain and noise analysis and new mixer topologiesVoltage-controlled oscillators, phase noise mechanisms, and various VCO topologies dealing with noisepower-tuning trade-offsAll-new coverage of passive devices, such as integrated inductors, MOS varactors, and transformersA chapter on the analysis and design of phase-locked loops with emphasis on low phase noise and low spur levelsTwo chapters on integer-N and fractional-N synthesizers, including the design of frequency dividersPower amplifier principles and circuit topologies along with transmitter architectures, such as polar modulation and outphasing
Preface to the Second Edition xv
Preface to the First Edition xix
Acknowledgments xxi
About the Author xxiii
Chapter 1 Introduction to RF and Wireless Technology
1(6)
1.1 A Wireless World
1(2)
1.2 RF Design Is Challenging
3(1)
1.3 The Big Picture
4(3)
References
5(2)
Chapter 2 Basic Concepts in RF Design
7(84)
2.1 General Considerations
7(7)
2.1.1 Units in RF Design
7(2)
2.1.2 Time Variance
9(3)
2.1.3 Nonlinearity
12(2)
2.2 Effects of Nonlinearity
14(21)
2.2.1 Harmonic Distortion
14(2)
2.2.2 Gain Compression
16(4)
2.2.3 Cross Modulation
20(1)
2.2.4 Intermodulation
21(8)
2.2.5 Cascaded Nonlinear Stages
29(4)
2.2.6 AM/PM Conversion
33(2)
2.3 Noise
35(23)
2.3.1 Noise as a Random Process
36(1)
2.3.2 Noise Spectrum
37(2)
2.3.3 Effect of Transfer Function on Noise
39(1)
2.3.4 Device Noise
40(6)
2.3.5 Representation of Noise in Circuits
46(12)
2.4 Sensitivity and Dynamic Range
58(4)
2.4.1 Sensitivity
59(1)
2.4.2 Dynamic Range
60(2)
2.5 Passive Impedance Transformation
62(9)
2.5.1 Quality Factor
63(1)
2.5.2 Series-to-Parallel Conversion
63(2)
2.5.3 Basic Matching Networks
65(4)
2.5.4 Loss in Matching Networks
69(2)
2.6 Scattering Parameters
71(4)
2.7 Analysis of Nonlinear Dynamic Systems
75(2)
2.7.1 Basic Considerations
75(2)
2.8 Volterra Series
77(14)
2.8.1 Method of Nonlinear Currents
81(5)
References
86(1)
Problems
86(5)
Chapter 3 Communication Concepts
91(64)
3.1 General Considerations
91(2)
3.2 Analog Modulation
93(6)
3.2.1 Amplitude Modulation
93(2)
3.2.2 Phase and Frequency Modulation
95(4)
3.3 Digital Modulation
99(19)
3.3.1 Intersymbol Interference
101(4)
3.3.2 Signal Constellations
105(2)
3.3.3 Quadrature Modulation
107(5)
3.3.4 GMSK and GFSK Modulation
112(2)
3.3.5 Quadrature Amplitude Modulation
114(1)
3.3.6 Orthogonal Frequency Division Multiplexing
115(3)
3.4 Spectral Regrowth
118(1)
3.5 Mobile RF Communications
119(4)
3.6 Multiple Access Techniques
123(7)
3.6.1 Time and Frequency Division Duplexing
123(2)
3.6.2 Frequency-Division Multiple Access
125(1)
3.6.3 Time-Division Multiple Access
125(1)
3.6.4 Code-Division Multiple Access
126(4)
3.7 Wireless Standards
130(21)
3.7.1 GSM
132(5)
3.7.2 IS-95 CDMA
137(2)
3.7.3 Wideband CDMA
139(4)
3.7.4 Bluetooth
143(4)
3.7.5 IEEE802.11a/b/g
147(4)
3.8 Appendix I: Differential Phase Shift Keying
151(4)
References
152(1)
Problems
152(3)
Chapter 4 Transceiver Architectures
155(100)
4.1 General Considerations
155(5)
4.2 Receiver Architectures
160(66)
4.2.1 Basic Heterodyne Receivers
160(11)
4.2.2 Modern Heterodyne Receivers
171(8)
4.2.3 Direct-Conversion Receivers
179(21)
4.2.4 Image-Reject Receivers
200(14)
4.2.5 Low-IF Receivers
214(12)
4.3 Transmitter Architectures
226(22)
4.3.1 General Considerations
226(1)
4.3.2 Direct-Conversion Transmitters
227(11)
4.3.3 Modern Direct-Conversion Transmitters
238(6)
4.3.4 Heterodyne Transmitters
244(4)
4.3.5 Other TX Architectures
248(1)
4.4 OOK Transceivers
248(7)
References
249(1)
Problems
250(5)
Chapter 5 Low-Noise Amplifiers
255(82)
5.1 General Considerations
255(8)
5.2 Problem of Input Matching
263(3)
5.3 LNA Topologies
266(39)
5.3.1 Common-Source Stage with Inductive Load
266(3)
5.3.2 Common-Source Stage with Resistive Feedback
269(3)
5.3.3 Common-Gate Stage
272(12)
5.3.4 Cascode CS Stage with Inductive Degeneration
284(12)
5.3.5 Variants of Common-Gate LNA
296(4)
5.3.6 Noise-Cancelling LNAs
300(3)
5.3.7 Reactance-Cancelling LNAs
303(2)
5.4 Gain Switching
305(7)
5.5 Band Switching
312(1)
5.6 High-IP2 LNAs
313(12)
5.6.1 Differential LNAs
314(9)
5.6.2 Other Methods of IP2 Improvement
323(2)
5.7 Nonlinearity Calculations
325(12)
5.7.1 Degenerated CS Stage
325(4)
5.7.2 Undegenerated CS Stage
329(2)
5.7.3 Differential and Quasi-Differential Pairs
331(1)
5.7.4 Degenerated Differential Pair
332(1)
References
333(1)
Problems
333(4)
Chapter 6 Mixers
337(92)
6.1 General Considerations
337(13)
6.1.1 Performance Parameters
338(5)
6.1.2 Mixer Noise Figures
343(5)
6.1.3 Single-Balanced and Double-Balanced Mixers
348(2)
6.2 Passive Downconversion Mixers
350(18)
6.2.1 Gain
350(7)
6.2.2 LO Self-Mixing
357(1)
6.2.3 Noise
357(7)
6.2.4 Input Impedance
364(2)
6.2.5 Current-Driven Passive Mixers
366(2)
6.3 Active Downconversion Mixers
368(25)
6.3.1 Conversion Gain
370(7)
6.3.2 Noise in Active Mixers
377(10)
6.3.3 Linearity
387(6)
6.4 Improved Mixer Topologies
393(15)
6.4.1 Active Mixers with Current-Source Helpers
393(1)
6.4.2 Active Mixers with Enhanced Transconductance
394(3)
6.4.3 Active Mixers with High IP2
397(8)
6.4.4 Active Mixers with Low Flicker Noise
405(3)
6.5 Upconversion Mixers
408(21)
6.5.1 Performance Requirements
408(1)
6.5.2 Upconversion Mixer Topologies
409(15)
References
424(1)
Problems
425(4)
Chapter 7 Passive Devices
429(68)
7.1 General Considerations
429(2)
7.2 Inductors
431(39)
7.2.1 Basic Structure
431(4)
7.2.2 Inductor Geometries
435(1)
7.2.3 Inductance Equations
436(3)
7.2.4 Parasitic Capacitances
439(5)
7.2.5 Loss Mechanisms
444(11)
7.2.6 Inductor Modeling
455(5)
7.2.7 Alternative Inductor Structures
460(10)
7.3 Transformers
470(6)
7.3.1 Transformer Structures
470(5)
7.3.2 Effect of Coupling Capacitance
475(1)
7.3.3 Transformer Modeling
475(1)
7.4 Transmission Lines
476(7)
7.4.1 T-Line Structures
478(5)
7.5 Varactors
483(7)
7.6 Constant Capacitors
490(7)
7.6.1 MOS Capacitors
491(2)
7.6.2 Metal-Plate Capacitors
493(2)
References
495(1)
Problems
496(1)
Chapter 8 Oscillators
497(100)
8.1 Performance Parameters
497(4)
8.2 Basic Principles
501(10)
8.2.1 Feedback View of Oscillators
502(6)
8.2.2 One-Port View of Oscillators
508(3)
8.3 Cross-Coupled Oscillator
511(6)
8.4 Three-Point Oscillators
517(1)
8.5 Voltage-Controlled Oscillators
518(6)
8.5.1 Tuning Range Limitations
521(1)
8.5.2 Effect of Varactor Q
522(2)
8.6 LC VCOs with Wide Tuning Range
524(12)
8.6.1 VCOs with Continuous Tuning
524(8)
8.6.2 Amplitude Variation with Frequency Tuning
532(1)
8.6.3 Discrete Tuning
532(4)
8.7 Phase Noise
536(35)
8.7.1 Basic Concepts
536(3)
8.7.2 Effect of Phase Noise
539(5)
8.7.3 Analysis of Phase Noise: Approach I
544(13)
8.7.4 Analysis of Phase Noise: Approach II
557(8)
8.7.5 Noise of Bias Current Source
565(5)
8.7.6 Figures of Merit of VCOs
570(1)
8.8 Design Procedure
571(4)
8.8.1 Low-Noise VCOs
573(2)
8.9 LO Interface
575(2)
8.10 Mathematical Model of VCOs
577(4)
8.11 Quadrature Oscillators
581(11)
8.11.1 Basic Concepts
581(3)
8.11.2 Properties of Coupled Oscillators
584(5)
8.11.3 Improved Quadrature Oscillators
589(3)
8.12 Appendix I: Simulation of Quadrature Oscillators
592(5)
References
593(1)
Problems
594(3)
Chapter 9 Phase-Locked Loops
597(58)
9.1 Basic Concepts
597(3)
9.1.1 Phase Detector
597(3)
9.2 Type-I PLLs
600(11)
9.2.1 Alignment of a VCO's Phase
600(1)
9.2.2 Simple PLL
601(2)
9.2.3 Analysis of Simple PLL
603(3)
9.2.4 Loop Dynamics
606(3)
9.2.5 Frequency Multiplication
609(2)
9.2.6 Drawbacks of Simple PLL
611(1)
9.3 Type-II PLLs
611(16)
9.3.1 Phase/Frequency Detectors
612(2)
9.3.2 Charge Pumps
614(1)
9.3.3 Charge-Pump PLLs
615(5)
9.3.4 Transient Response
620(2)
9.3.5 Limitations of Continuous-Time Approximation
622(1)
9.3.6 Frequency-Multiplying CPPLL
623(2)
9.3.7 Higher-Order Loops
625(2)
9.4 PFD/CP Nonidealities
627(11)
9.4.1 Up and Down Skew and Width Mismatch
627(3)
9.4.2 Voltage Compliance
630(1)
9.4.3 Charge Injection and Clock Feedthrough
630(2)
9.4.4 Random Mismatch between Up and Down Currents
632(1)
9.4.5 Channel-Length Modulation
633(1)
9.4.6 Circuit Techniques
634(4)
9.5 Phase Noise in PLLs
638(7)
9.5.1 VCO Phase Noise
638(5)
9.5.2 Reference Phase Noise
643(2)
9.6 Loop Bandwidth
645(1)
9.7 Design Procedure
646(1)
9.8 Appendix I: Phase Margin of Type-II PLLs
647(8)
References
651(1)
Problems
652(3)
Chapter 10 Integer-N Frequency Synthesizers
655(60)
10.1 General Considerations
655(4)
10.2 Basic Integer-N Synthesizer
659(2)
10.3 Settling Behavior
661(3)
10.4 Spur Reduction Techniques
664(3)
10.5 PLL-Based Modulation
667(6)
10.5.1 In-Loop Modulation
667(3)
10.5.2 Modulation by Offset PLLs
670(3)
10.6 Divider Design
673(42)
10.6.1 Pulse Swallow Divider
674(3)
10.6.2 Dual-Modulus Dividers
677(5)
10.6.3 Choice of Prescaler Modulus
682(1)
10.6.4 Divider Logic Styles
683(16)
10.6.5 Miller Divider
699(8)
10.6.6 Injection-Locked Dividers
707(2)
10.6.7 Divider Delay and Phase Noise
709(3)
References
712(1)
Problems
713(2)
Chapter 11 Fractional-N Synthesizers
715(36)
11.1 Basic Concepts
715(3)
11.2 Randomization and Noise Shaping
718(20)
11.2.1 Modulus Randomization
718(4)
11.2.2 Basic Noise Shaping
722(6)
11.2.3 Higher-Order Noise Shaping
728(4)
11.2.4 Problem of Out-of-Band Noise
732(1)
11.2.5 Effect of Charge Pump Mismatch
733(5)
11.3 Quantization Noise Reduction Techniques
738(10)
11.3.1 DAC Feedforward
738(4)
11.3.2 Fractional Divider
742(1)
11.3.3 Reference Doubling
743(2)
11.3.4 Multiphase Frequency Division
745(3)
11.4 Appendix I: Spectrum of Quantization Noise
748(3)
References
749(1)
Problems
749(2)
Chapter 12 Power Amplifiers
751(82)
12.1 General Considerations
751(9)
12.1.1 Effect of High Currents
754(1)
12.1.2 Efficiency
755(1)
12.1.3 Linearity
756(2)
12.1.4 Single-Ended and Differential PAs
758(2)
12.2 Classification of Power Amplifiers
760(10)
12.2.1 Class A Power Amplifiers
760(4)
12.2.2 Class B Power Amplifiers
764(4)
12.2.3 Class C Power Amplifiers
768(2)
12.3 High-Efficiency Power Amplifiers
770(6)
12.3.1 Class A Stage with Harmonic Enhancement
771(1)
12.3.2 Class E Stage
772(3)
12.3.3 Class F Power Amplifiers
775(1)
12.4 Cascode Output Stages
776(4)
12.5 Large-Signal Impedance Matching
780(2)
12.6 Basic Linearization Techniques
782(8)
12.6.1 Feedforward
783(3)
12.6.2 Cartesian Feedback
786(1)
12.6.3 Predistortion
787(1)
12.6.4 Envelope Feedback
788(2)
12.7 Polar Modulation
790(12)
12.7.1 Basic Idea
790(3)
12.7.2 Polar Modulation Issues
793(3)
12.7.3 Improved Polar Modulation
796(6)
12.8 Outphasing
802(9)
12.8.1 Basic Idea
802(3)
12.8.2 Outphasing Issues
805(6)
12.9 Doherty Power Amplifier
811(3)
12.10 Design Examples
814(19)
12.10.1 Cascode PA Examples
815(4)
12.10.2 Positive-Feedback PAs
819(2)
12.10.3 PAs with Power Combining
821(3)
12.10.4 Polar Modulation PAs
824(2)
12.10.5 Outphasing PA Example
826(4)
References
830(1)
Problems
831(2)
Chapter 13 Transceiver Design Example
833(56)
13.1 System-Level Considerations
833(15)
13.1.1 Receiver
834(4)
13.1.2 Transmitter
838(2)
13.1.3 Frequency Synthesizer
840(4)
13.1.4 Frequency Planning
844(4)
13.2 Receiver Design
848(13)
13.2.1 LNA Design
849(2)
13.2.2 Mixer Design
851(5)
13.2.3 AGC
856(5)
13.3 TX Design
861(8)
13.3.1 PA Design
861(6)
13.3.2 Upconverter
867(2)
13.4 Synthesizer Design
869(20)
13.4.1 VCO Design
869(9)
13.4.2 Divider Design
878(4)
13.4.3 Loop Design
882(4)
References
886(1)
Problems
886(3)
Index 889
Behzad Razavi, Professor of Electrical Engineering at UCLA, leads the Communication Circuits Laboratory (CCL). Emphasizing the use of mainstream CMOS technologies, CCL's research seeks and exploits new devices, circuits, and architectures to push the performance envelope. Razavi holds a BSEE from Sharif University of Technology and MSEE and PhDEE degrees from Stanford. He was with ATT Bell Laboratories and HP Labs until 1996. An IEEE Distinguished Lecturer and IEEE Fellow, his books include Design of Analog CMOS Integrated Circuits, Design of Integrated Circuits for Optical Communications, and Fundamentals of Microelectronics.