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E-grāmata: Techniques for Building Timing-Predictable Embedded Systems

  • Formāts: PDF+DRM
  • Izdošanas datums: 03-Feb-2016
  • Izdevniecība: Springer International Publishing AG
  • Valoda: eng
  • ISBN-13: 9783319271989
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Techniques for Building Timing-Predictable Embedded SystemsPalielināt
  • Formāts: PDF+DRM
  • Izdošanas datums: 03-Feb-2016
  • Izdevniecība: Springer International Publishing AG
  • Valoda: eng
  • ISBN-13: 9783319271989
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This book describes state-of-the-art techniques for designing real-time computer systems. The author shows how to estimate precisely the effect of cache architecture on the execution time of a program, how to dispatch workload on multicore processors to optimize resources, while meeting deadline constraints, and how to use closed-form mathematical approaches to characterize highly variable workloads  and their interaction in a networked environment. Readers will learn how to deal with unpredictable timing behaviors of computer systems on different levels of system granularity and abstraction. 

1 Introduction
1(20)
1.1 Technical Background
3(6)
1.1.1 WCET Estimation and Cache Analysis
3(3)
1.1.2 Multiprocessor Real-Time Scheduling
6(3)
1.2 Real-Time Calculus
9(2)
1.3 What's New in This Book
11(10)
1.3.1 Quantitative Cache Analysis for WCET Estimation
11(2)
1.3.2 Real-Time Scheduling for Multi-Cores
13(3)
1.3.3 Scalable and Precise Real-Time Calculus
16(5)
Part I Cache Analysis for WCET Estimation
2 MRU Cache Analysis for WCET Estimation
21(32)
2.1 Introduction
22(2)
2.2 Related Work
24(1)
2.3 Basic Concepts
25(4)
2.3.1 LRU Replacement
27(1)
2.3.2 MRU Replacement
28(1)
2.4 A Review of the Analysis for LRU
29(2)
2.5 The New Analysis of MRU
31(11)
2.5.1 New Classification: k-Miss
31(2)
2.5.2 Conditions for k-Miss
33(4)
2.5.3 Efficient k-Miss Determination
37(2)
2.5.4 Generalizing k-Miss for Nested Loops
39(2)
2.5.5 WCET Computation by IPET
41(1)
2.6 Experimental Evaluation
42(9)
2.6.1 Experiment Setup
43(1)
2.6.2 Results and Discussions
44(7)
2.7 Conclusions
51(2)
3 FIFO Cache Analysis for WCET Estimation
53(18)
3.1 Introduction
53(2)
3.1.1 Relation to Previous Work
55(1)
3.2 Preliminaries
55(2)
3.2.1 Basic Concepts
55(1)
3.2.2 LRU and FIFO
56(1)
3.2.3 LRU Cache Analysis
56(1)
3.3 A New Metric: Miss Distance
57(1)
3.4 Quantitative FIFO Analysis
58(4)
3.5 Computation of WCET Bounds
62(2)
3.6 Experimental Evaluation
64(1)
3.7 Discussion and Conclusion
65(6)
Appendix: The Complete IPET Formulation
66(5)
Part II Real-Time Scheduling on Multicores
4 Analyzing Preemptive Global Scheduling
71(14)
4.1 Introduction
71(1)
4.2 Problem Setting
72(1)
4.3 Previous Work
73(2)
4.3.1 The Basic Single-Processor Case
73(1)
4.3.2 The Basic Multiprocessor Case
74(1)
4.4 Constrained-Deadline Task Sets
75(6)
4.4.1 Busy Period Extension
75(2)
4.4.2 Workload and Interference
77(2)
4.4.3 The RTA Procedure
79(2)
4.5 Performance Evaluation
81(1)
4.6 Conclusions
82(3)
Appendix: Proof of Lemma 4.3
83(2)
5 Analyzing Non-preemptive Global Scheduling
85(20)
5.1 Introduction
85(2)
5.2 Related Work
87(2)
5.2.1 Preemptive Scheduling
87(1)
5.2.2 Non-preemptive Scheduling
88(1)
5.3 System Model and Notations
89(1)
5.4 The General Schedulability Test
90(3)
5.5 The Improved Schedulability Test for NP-FP
93(4)
5.6 Sustainability
97(2)
5.7 Performance Evaluation
99(1)
5.8 Simulations
100(3)
5.9 Conclusions
103(2)
6 Liu and Layland's Utilization Bound
105(24)
6.1 Introduction
105(1)
6.2 Prior Work
106(1)
6.3 Basic Concepts
107(1)
6.4 The First Algorithm SPA1
107(10)
6.4.1 SPA1: Partitioning and Scheduling
109(1)
6.4.2 Schedulability
110(6)
6.4.3 Utilization Bound
116(1)
6.5 The Second Algorithm SPA2
117(10)
6.5.1 SPA2: Partitioning and Scheduling
118(4)
6.5.2 Properties
122(1)
6.5.3 Schedulability
123(4)
6.5.4 Utilization Bound
127(1)
6.5.5 Task Splitting Overhead
127(1)
6.6 Conclusions and Future Work
127(2)
7 Parametric Utilization Bounds
129(28)
7.1 Introduction
129(2)
7.2 Related Work
131(1)
7.3 Basic Concepts
132(1)
7.4 Parametric Utilization Bounds
133(2)
7.5 The Algorithm for Light Tasks
135(8)
7.5.1 Algorithm Description
136(3)
7.5.2 Utilization Bound
139(4)
7.6 The Algorithm for Any Task Set
143(12)
7.6.1 Algorithm Description
144(3)
7.6.2 Utilization Bound
147(8)
7.7 Conclusions
155(2)
8 Cache-Aware Scheduling
157(26)
8.1 Introduction
158(1)
8.2 Related Work
159(1)
8.3 Preliminaries
160(3)
8.3.1 Cache Space Partitioning
161(1)
8.3.2 Task Model
162(1)
8.4 Cache-Aware Scheduling
163(4)
8.4.1 The Scheduling Algorithm FPCA
163(1)
8.4.2 Problem Window Analysis
164(3)
8.5 The First Test: LP-Based
167(5)
8.5.1 Interference Calculation
168(1)
8.5.2 Schedulability Test as an LP Problem
168(4)
8.6 The Second Test: Closed Form
172(2)
8.7 Performance Evaluation
174(1)
8.8 Extensions
175(2)
8.8.1 Blocking vs. Non-blocking Scheduling
175(1)
8.8.2 Other Scheduling Strategies
176(1)
8.9 Conclusions
177(6)
Appendix: Improving the Interference Computation
177(6)
Part III Real-Time Calculus
9 Finitary Real-Time Calculus
183(26)
9.1 Introduction
183(2)
9.1.1 Related Work
184(1)
9.2 RTC Basics
185(4)
9.2.1 Arrival and Service Curves
185(2)
9.2.2 Greedy Processing Component
187(1)
9.2.3 Performance Analysis Network
188(1)
9.3 Efficiency Bottleneck of RTC
189(1)
9.4 Overview of Finitary RTC
190(2)
9.5 Analyzing GPC with Finitary Deconvolution
192(1)
9.6 Analysis Network in Finitary RTC
193(3)
9.6.1 Bounding Individual MBS
194(1)
9.6.2 Decision of Curve Upper Limits
195(1)
9.6.3 Complexity
196(1)
9.7 Evaluation
196(4)
9.7.1 Case Study
197(1)
9.7.2 Factors That Affect the Speedup Ratio
198(2)
9.8 Conclusions and Future Work
200(9)
Appendix 1 Proof of Theorem 9.1
201(1)
Appendix 2 Proof of Theorem 9.2
201(8)
10 EDF in Real-Time Calculus
209(18)
10.1 Introduction
209(1)
10.2 Preliminaries
210(3)
10.2.1 Resource Model
210(1)
10.2.2 Workload Model
211(1)
10.2.3 EDF Scheduling and Worst-Case Response Time
212(1)
10.2.4 Review of Spuri's RTA for EDF
212(1)
10.3 Over-Approximate RTA
213(4)
10.3.1 Special Case Where S*i is Exact
215(1)
10.3.2 Algorithmic Implementation and Complexity
216(1)
10.4 Exact RTA
217(3)
10.4.1 Algorithmic Implementation and Complexity
219(1)
10.5 Evaluation
220(2)
10.5.1 Efficiency Improvement
220(1)
10.5.2 Comparing the Two Proposed Methods
221(1)
10.6 Analysis of EDF Component in RTC
222(3)
10.7 Conclusions
225(2)
References 227
Nan Guan is a researcher in the Embedded Systems Institute of the College of Computer Science and Engineering, at Northeastern University, China. His research interest includes Multiprocessor/multicore scheduling, Worst-Case Execution Time analysis, and Software synthesis of dataflow models.
Biežāk uzdotie jautājumi par e-grāmatām Biežāk uzdotie jautājumi par e-grāmatām
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