Part I Introduction and Background |
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xvii | |
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1 | (6) |
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1 | (2) |
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Vision Chips in the Past and Present |
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3 | (2) |
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Analog VLSI Design Framework |
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4 | (1) |
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5 | (2) |
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Computer Vision for Analog VLSI |
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7 | (16) |
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Computational Motion Detection Algorithms |
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8 | (3) |
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Intensity Based Motion Detection |
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9 | (1) |
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Feature Based Motion Detection |
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10 | (1) |
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Correlation Based Motion Detection |
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11 | (1) |
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Biological Motion Detection Models |
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11 | (2) |
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13 | (10) |
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Computational Models for Contrast Enhancement |
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15 | (1) |
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Subtraction from spatial average |
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15 | (1) |
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Division by spatial average |
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16 | (1) |
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Laplacian of Gaussian (LoG) |
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16 | (1) |
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17 | (1) |
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Regularization theory for surface reconstruction |
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18 | (1) |
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Biological Models for Contrast Enhancement |
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18 | (1) |
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Linear lateral inhibition |
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18 | (1) |
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Nonlinear lateral inhibition |
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19 | (1) |
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19 | (4) |
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Analog VLSI for Computer Vision |
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23 | (22) |
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24 | (4) |
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24 | (1) |
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25 | (3) |
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Analog VLSI and Artificial Neural Networks |
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28 | (3) |
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28 | (1) |
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29 | (1) |
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30 | (1) |
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30 | (1) |
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30 | (1) |
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Analog VLSI and Vision Chips |
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31 | (1) |
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Technology Base for Implementation |
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32 | (4) |
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32 | (2) |
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34 | (1) |
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34 | (2) |
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36 | (1) |
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Analog VLSI Design Methodologies |
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36 | (5) |
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Current Mode & Voltage Mode |
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37 | (1) |
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38 | (2) |
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40 | (1) |
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40 | (1) |
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41 | (1) |
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41 | (1) |
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41 | (4) |
Part II Synthesis of Vision Algorithms |
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45 | (84) |
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Vision Chips Architectures |
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49 | (16) |
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Pixel Level Structures and Tessellation |
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49 | (5) |
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Periodic Spatial Sampling and Tessellation |
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50 | (1) |
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50 | (2) |
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Tessellation Structures for Vision Chips |
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52 | (1) |
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Spatial Re-Mapping Structures |
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53 | (1) |
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Sensor-Processor Architectures |
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54 | (5) |
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56 | (1) |
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Spatial Processing Algorithms |
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57 | (1) |
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Spatio-temporal Processing Algorithms |
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57 | (2) |
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System Level Read-out and Communication |
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59 | (3) |
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Passive & Active Information Transfer |
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60 | (1) |
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60 | (2) |
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62 | (3) |
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Building Blocks for Vision Chips |
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65 | (36) |
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65 | (3) |
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68 | (7) |
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Logarithmic Compression Photocircuit |
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69 | (1) |
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Logarithmic Compression With Feedback Amplifier |
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70 | (1) |
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Buffered Logarithmic Photocircuit |
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71 | (1) |
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Adaptive Logarithmic Photocircuits |
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72 | (2) |
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Current Amplifier Photocircuit |
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74 | (1) |
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Charge-Integration Photocircuit |
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75 | (1) |
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Circuits and techniques for active pixel sensors |
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75 | (3) |
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Photocircuits in active pixel sensors |
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76 | (1) |
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Correlated double sampling |
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77 | (1) |
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Circuits for Spatial Processing |
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78 | (21) |
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80 | (1) |
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81 | (1) |
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82 | (2) |
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84 | (1) |
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Circuits and Networks for Spatial Smoothing |
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84 | (8) |
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Nonlinear Resistive Networks |
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92 | (2) |
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Resistive Networks Using Saturating Resistor |
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94 | (1) |
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Resistive Networks Using Resistive Fuse |
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94 | (1) |
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Circuits and Networks for Contrast Enhancement |
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94 | (2) |
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96 | (3) |
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Continuous Delay Elements |
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99 | (1) |
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99 | (2) |
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101 | (8) |
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101 | (3) |
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104 | (1) |
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105 | (1) |
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106 | (1) |
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107 | (2) |
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109 | (20) |
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109 | (14) |
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Sources and Modeling of Mismatch |
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110 | (1) |
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111 | (1) |
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112 | (1) |
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Mismatch in Interconnected Networks |
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113 | (1) |
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114 | (2) |
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116 | (7) |
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123 | (1) |
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123 | (1) |
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124 | (2) |
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126 | (3) |
Part III Vision Sensors |
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129 | (76) |
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131 | (32) |
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Mahowald and Mead's silicon retina |
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132 | (1) |
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133 | (1) |
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Mahowald-Delbruck's Stereo Matching Chips |
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133 | (2) |
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Bernard et al.'s Boolean artificial retina |
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135 | (2) |
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Andreou and Boahen's silicon retina |
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137 | (1) |
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Kobayashi et al.'s image Gaussian filter |
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138 | (1) |
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PASIC sensor from Linkoping University |
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139 | (1) |
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140 | (2) |
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Forchheimer-Astrom's NSIP sensor |
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142 | (1) |
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143 | (2) |
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IMEC-IBIDEM's foveated CMOS chip |
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145 | (1) |
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Wodnicki et al.'s foveated CMOS sensor |
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145 | (1) |
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Standley's Orientation Detection Chip |
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146 | (1) |
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Harris et al.'s Resistive Fuse Vision Chip |
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147 | (3) |
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DeWeerth's Localization and Centroid Computation Chip |
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150 | (1) |
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Ward & Syrzycki's Receptive Field Sensors |
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151 | (1) |
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Wu & Chiu's 2-D Silicon Retina |
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152 | (1) |
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Nilson et al.'s Shunting Inhibition Chip |
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153 | (2) |
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Keast & Sodini's CCD/CMOS Image Segmentation Chip |
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155 | (1) |
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Mitsubishi Electric's CMOS Artificial Retina with VSP |
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156 | (2) |
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Venier et al.'s Solar Illumination Monitoring Chip |
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158 | (1) |
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Mitsubishi Electric's Optical Neurochip and Retina |
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159 | (1) |
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Yu et al.'s Optical Neurochip |
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160 | (3) |
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Spatio-Temporal Vision Chips |
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163 | (36) |
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164 | (1) |
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Tanner and Mead's correlating motion detection chip |
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164 | (1) |
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Tanner and Mead's optic flow motion detection chip |
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165 | (2) |
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Bair and Koch's motion detection chip |
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167 | (1) |
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168 | (1) |
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Delbruck's velocity tuned motion sensor |
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169 | (1) |
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Meitzler et al.'s sampled-data motion chip |
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170 | (1) |
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Moini et al.'s insect vision-based motion detection chip |
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171 | (2) |
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Moini et al.'s second insect vision-based motion detection chip |
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173 | (2) |
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Dron's multi-scale veto CCD motion sensor |
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175 | (1) |
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Horiuchi et al.'s delay line-based motion detection chip |
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176 | (1) |
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Gottardi and Yang's CCD/CMOS motion sensor |
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177 | (2) |
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Kramer et al.'s velocity sensor |
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179 | (1) |
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Indiveri et al.'s time-to-crash sensor |
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179 | (3) |
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Indiveri et al.'s direction-of-heading detector |
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182 | (2) |
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McQuirk's CCD focus of expansion estimation chip |
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184 | (1) |
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Sarpeshkar et al.'s pulse mode motion detector |
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185 | (1) |
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Meitzler et al.'s 2-D position and motion detection chip |
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186 | (2) |
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Aizawa et al.'s Image Sensor with Compression |
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188 | (1) |
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Hamamoto et al.'s Image Sensor With Motion Adaptive Storage Time |
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189 | (1) |
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Espejo et al.'s Smart Pixel CNN |
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190 | (3) |
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Moini et al.'s Shunting Inhibition Vision Chip |
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193 | (1) |
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Etienne-Cummings et al.'s Motion Detector Chip |
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194 | (1) |
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CSEM's Motion Detector Chip for Pointing Devices |
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195 | (4) |
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Analog VLSI Chips for Vision Processing |
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199 | (6) |
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Hakkaranien-Lee's AVD CCD Chip for Stereo Vision |
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199 | (2) |
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Erten's CMOS Chip for Stereo Correspondence |
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201 | (4) |
Part IV Case Studies |
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205 | (38) |
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Bugeye II: The Second Insect Vision Motion Detection Chip |
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209 | (14) |
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Testability and Reconfigurability |
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210 | (2) |
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210 | (1) |
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211 | (1) |
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212 | (1) |
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Multiplicative Noise Cancellation |
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212 | (4) |
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The source of multiplicative noise |
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212 | (2) |
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Reducing multiplicative noise |
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214 | (2) |
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216 | (6) |
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222 | (1) |
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223 | (8) |
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223 | (2) |
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Photocircuits in Bugeye V |
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225 | (3) |
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228 | (1) |
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229 | (2) |
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231 | (12) |
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231 | (3) |
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Current Mode Implementation of SI |
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232 | (1) |
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Simulation and Test Results of the SI Circuit |
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233 | (1) |
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234 | (6) |
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236 | (3) |
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Light-Modulated MOS Transistors |
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239 | (1) |
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240 | (3) |
Part V Appendices |
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243 | (30) |
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A Quantum Efficiency of Photodetectors |
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245 | (20) |
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A.1 Quantum Efficiency of a Vertical Junction Diode |
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246 | (3) |
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A.2 Quantum Efficiency of a Lateral Junction Diode |
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249 | (3) |
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A.3 Quantum Efficiency of a Vertical Bipolar transistor |
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252 | (4) |
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A.4 Quantum Efficiency of a Lateral Bipolar Photodetector |
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256 | (5) |
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261 | (1) |
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A.6 Quantum Efficiency of a Photogate |
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261 | (4) |
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B Analysis of Second-Order Resistive Networks |
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265 | (8) |
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265 | (4) |
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269 | (4) |
Bibliography |
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273 | (23) |
Index |
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